[PATCH] D31077: Improve DAGTypeLegalizer::PromoteIntRes_TRUNCATE() to handle widening.

[Jonas Paulsson via Phabricator via llvm-commits]

jonpa created this revision.

DAGTypeLegalizer::PromoteIntRes_TRUNCATE() did previously not handle the case where the operand needs to be widened, which resultet in a llvm_unreachable()l.

This was discovered with llvm-stress and reported at https://bugs.llvm.org/show_bug.cgi?id=32275. The stress test case is included also in this patch as a regression test for SystemZ.

The test case involves a truncate from v4i8 to v4i1. On SystemZ, v4i8 should be widened to v16i8.

  t17: v16i8,ch = CopyFromReg t0, Register:v16i8 %vreg13
    t18: v4i8 = extract_subvector t17, Constant:i32<0>
       t19: v4i1 = truncate t18

The patch net result is (after type legalization)

                   t264: i32 = extract_vector_elt t17, Constant:i32<0>
                    t260: i32 = extract_vector_elt t17, Constant:i32<1>
                    t256: i32 = extract_vector_elt t17, Constant:i32<2>
                    t252: i32 = extract_vector_elt t17, Constant:i32<3>
             t222: v4i32 = BUILD_VECTOR t264, t260, t256, t252
        t112: v4i32 = BUILD_VECTOR Constant:i32<1>, Constant:i32<1>, Constant:i32<1>, Constant:i32<1>
    t224: v4i32 = and t222, t112
  t270: v4i32 = sign_extend_inreg t224, ValueType:ch:v4i1

The final output does not look optimal, but since this is so rare, it should not matter.


https://reviews.llvm.org/D31077

Files:
  lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  test/CodeGen/SystemZ/vec-trunc-to-i1.ll

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