[PATCH] D30914: [Outliner] Add outliner for AArch64
Matthias Braun via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 16 17:32:04 PDT 2017
MatzeB added inline comments.
================
Comment at: lib/Target/AArch64/AArch64InstrInfo.cpp:1410-1463
+ // Check if the offset is in the range.
+ switch(MI.getOpcode()) {
+ // Unsigned instructions.
+ default:
+ return (Offset >= 0 && Offset <= 4095);
+
+ // Signed instructions with 9 bit offsets.
----------------
Seeing that this is another instance of information about every load/store instruction. How about emitting this information as well if we go for something like getMemOpInfo()?
================
Comment at: lib/Target/AArch64/AArch64InstrInfo.h:223
+ }
+ }
+
----------------
We should only put short and performance critical functions into a header (and well templates force you sometimes).
It shouldn't be too hard to share code with `getMemOpBaseRegImmOfsWidth()` and for maintenance reasons we really should do so:
- Add a new function similar to this:
```
/// Returns true if opcode \p Opc is a memory operation and set \p Scale and \p Width
/// accordingly.
bool getMemOpInfo(unsigned Opcode, unsigned &Scale, unsigned &Width) {
switch (Opc) {
// Move stuff from getMemOpBaseRegImmOfsWidth() here
}
}
bool AArch64InstrInfo::getMemOpBaseRegImmOfsWidth(...) {
// ... keep the beginning as is ...
unsigned Scale = 0;
if (!getMemOpInfo(LdSt.getOpcode(), Width, Scale))
return false;
// ... keep end as is ...
}
// Every use of getScale() can now call getMemOpInfo() and just ignore the Width value
```
https://reviews.llvm.org/D30914
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