[llvm] r297962 - Revert "PR32288: More efficient encoding for DWARF expr subregister access."

Adrian Prantl via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 16 09:38:22 PDT 2017


Author: adrian
Date: Thu Mar 16 11:38:22 2017
New Revision: 297962

URL: http://llvm.org/viewvc/llvm-project?rev=297962&view=rev
Log:
Revert "PR32288: More efficient encoding for DWARF expr subregister access."

This reverts commit 2bf453116889a576956892ea9683db4fcd96e30e while investigating buildbot breakage.

Modified:
    llvm/trunk/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
    llvm/trunk/lib/CodeGen/AsmPrinter/DwarfExpression.h
    llvm/trunk/test/DebugInfo/ARM/s-super-register.ll
    llvm/trunk/test/DebugInfo/X86/PR26148.ll
    llvm/trunk/test/DebugInfo/X86/dbg-value-const-byref.ll
    llvm/trunk/test/DebugInfo/X86/dbg-value-regmask-clobber.ll
    llvm/trunk/test/DebugInfo/X86/dw_op_minus_direct.ll
    llvm/trunk/test/DebugInfo/X86/fission-ranges.ll
    llvm/trunk/test/DebugInfo/X86/single-dbg_value.ll
    llvm/trunk/test/DebugInfo/X86/subreg.ll
    llvm/trunk/test/DebugInfo/X86/subregisters.ll

Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfExpression.cpp?rev=297962&r1=297961&r2=297962&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfExpression.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfExpression.cpp Thu Mar 16 11:38:22 2017
@@ -66,12 +66,6 @@ void DwarfExpression::AddShr(unsigned Sh
   EmitOp(dwarf::DW_OP_shr);
 }
 
-void DwarfExpression::AddAnd(unsigned Mask) {
-  EmitOp(dwarf::DW_OP_constu);
-  EmitUnsigned(Mask);
-  EmitOp(dwarf::DW_OP_and);
-}
-
 bool DwarfExpression::AddMachineRegIndirect(const TargetRegisterInfo &TRI,
                                             unsigned MachineReg, int Offset) {
   if (isFrameRegister(TRI, MachineReg)) {
@@ -236,12 +230,6 @@ void DwarfExpression::AddExpression(DIEx
                                     unsigned FragmentOffsetInBits) {
   while (ExprCursor) {
     auto Op = ExprCursor.take();
-
-    // If we need to mask out a subregister, do it now, unless the next
-    // operation would emit an OpPiece anyway.
-    if (SubRegisterSizeInBits && Op->getOp() != dwarf::DW_OP_LLVM_fragment)
-      maskSubRegister();
-
     switch (Op->getOp()) {
     case dwarf::DW_OP_LLVM_fragment: {
       unsigned SizeInBits = Op->getArg(1);
@@ -297,24 +285,9 @@ void DwarfExpression::AddExpression(DIEx
   }
 }
 
-/// Add masking operations to stencil out a subregister.
-void DwarfExpression::maskSubRegister() {
-  assert(SubRegisterSizeInBits && "no subregister was registered");
-  if (SubRegisterOffsetInBits > 0)
-    AddShr(SubRegisterOffsetInBits);
-  uint64_t Mask = (1UL << SubRegisterSizeInBits) - 1;
-  AddAnd(Mask);
-}
-
-
 void DwarfExpression::finalize() {
-  // Emit any outstanding DW_OP_piece operations to mask out subregisters.
-  if (SubRegisterSizeInBits == 0)
-    return;
-  // Don't emit a DW_OP_piece for a subregister at offset 0.
-  if (SubRegisterOffsetInBits == 0)
-    return;
-  AddOpPiece(SubRegisterSizeInBits, SubRegisterOffsetInBits);
+  if (SubRegisterSizeInBits)
+    AddOpPiece(SubRegisterSizeInBits, SubRegisterOffsetInBits);
 }
 
 void DwarfExpression::addFragmentOffset(const DIExpression *Expr) {

Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfExpression.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfExpression.h?rev=297962&r1=297961&r2=297962&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfExpression.h (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfExpression.h Thu Mar 16 11:38:22 2017
@@ -99,9 +99,6 @@ protected:
     SubRegisterOffsetInBits = OffsetInBits;
   }
 
-  /// Add masking operations to stencil out a subregister.
-  void maskSubRegister();
-
 public:
   DwarfExpression(unsigned DwarfVersion) : DwarfVersion(DwarfVersion) {}
   virtual ~DwarfExpression() {};
@@ -129,10 +126,8 @@ public:
   /// is at the top of the DWARF stack.
   void AddOpPiece(unsigned SizeInBits, unsigned OffsetInBits = 0);
 
-  /// Emit a shift-right dwarf operation.
+  /// Emit a shift-right dwarf expression.
   void AddShr(unsigned ShiftBy);
-  /// Emit a bitwise and dwarf operation.
-  void AddAnd(unsigned Mask);
 
   /// Emit a DW_OP_stack_value, if supported.
   ///

Modified: llvm/trunk/test/DebugInfo/ARM/s-super-register.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/ARM/s-super-register.ll?rev=297962&r1=297961&r2=297962&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/ARM/s-super-register.ll (original)
+++ llvm/trunk/test/DebugInfo/ARM/s-super-register.ll Thu Mar 16 11:38:22 2017
@@ -5,7 +5,9 @@ target triple = "thumbv7-apple-macosx10.
 ; The S registers on ARM are expressed as pieces of their super-registers in DWARF.
 ;
 ; 0x90   DW_OP_regx of super-register
-; CHECK:            Location description: 90
+; 0x93   DW_OP_piece
+; 0x9d   DW_OP_bit_piece
+; CHECK:            Location description: 90 {{.. .. ((93 ..)|(9d .. ..)) $}}
 
 define void @_Z3foov() optsize ssp !dbg !1 {
 entry:

Modified: llvm/trunk/test/DebugInfo/X86/PR26148.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/PR26148.ll?rev=297962&r1=297961&r2=297962&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/PR26148.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/PR26148.ll Thu Mar 16 11:38:22 2017
@@ -19,7 +19,7 @@
 ; AS in 26163, we expect two ranges (as opposed to one), the first one being zero sized
 ;
 ;
-; CHECK:             Beginning address offset: 0x0000000000000004
+; CHECK: 0x00000025: Beginning address offset: 0x0000000000000004
 ; CHECK:                Ending address offset: 0x0000000000000004
 ; CHECK:                 Location description: 10 03 93 04 55 93 02
 ; constu 0x00000003, piece 0x00000004, rdi, piece 0x00000002

Modified: llvm/trunk/test/DebugInfo/X86/dbg-value-const-byref.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/dbg-value-const-byref.ll?rev=297962&r1=297961&r2=297962&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/dbg-value-const-byref.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/dbg-value-const-byref.ll Thu Mar 16 11:38:22 2017
@@ -34,10 +34,10 @@
 ; CHECK: Beginning address offset: [[C1]]
 ; CHECK:    Ending address offset: [[C2:.*]]
 ; CHECK:     Location description: 11 07
-;        rax
+;        rax, piece 0x00000004
 ; CHECK: Beginning address offset: [[C2]]
 ; CHECK:    Ending address offset: [[R1:.*]]
-; CHECK:     Location description: 50
+; CHECK:     Location description: 50 93 04
 ;         rdi+0
 ; CHECK: Beginning address offset: [[R1]]
 ; CHECK:    Ending address offset: [[R2:.*]]

Modified: llvm/trunk/test/DebugInfo/X86/dbg-value-regmask-clobber.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/dbg-value-regmask-clobber.ll?rev=297962&r1=297961&r2=297962&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/dbg-value-regmask-clobber.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/dbg-value-regmask-clobber.ll Thu Mar 16 11:38:22 2017
@@ -16,8 +16,10 @@
 ; ASM: .Ldebug_loc1:
 ; ASM-NEXT: .quad   .Lfunc_begin0-.Lfunc_begin0
 ; ASM-NEXT: .quad   [[argc_range_end]]-.Lfunc_begin0
-; ASM-NEXT: .short  1                       # Loc expr size
+; ASM-NEXT: .short  3                       # Loc expr size
 ; ASM-NEXT: .byte   82                      # super-register DW_OP_reg2
+; ASM-NEXT: .byte   147                     # DW_OP_piece
+; ASM-NEXT: .byte   4                       # 4
 
 ; argc is the first formal parameter.
 ; DWARF: .debug_info contents:
@@ -28,7 +30,7 @@
 ; DWARF: .debug_loc contents:
 ; DWARF: [[argc_loc_offset]]: Beginning address offset: 0x0000000000000000
 ; DWARF-NEXT:                    Ending address offset: 0x0000000000000013
-; DWARF-NEXT:                     Location description: 52
+; DWARF-NEXT:                     Location description: 52 93 04
 
 ; ModuleID = 't.cpp'
 source_filename = "test/DebugInfo/X86/dbg-value-regmask-clobber.ll"

Modified: llvm/trunk/test/DebugInfo/X86/dw_op_minus_direct.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/dw_op_minus_direct.ll?rev=297962&r1=297961&r2=297962&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/dw_op_minus_direct.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/dw_op_minus_direct.ll Thu Mar 16 11:38:22 2017
@@ -8,8 +8,8 @@
 
 ; CHECK: Beginning address offset: 0x0000000000000000
 ; CHECK:    Ending address offset: 0x0000000000000004
-; CHECK:     Location description: 50 10 ff ff ff ff 0f 1a 10 01 1c
-;                                  rax, constu 0xffffffff, and, constu 0x00000001, minus
+; CHECK:     Location description: 50 10 01 1c 93 04
+;                                  rax, constu 0x00000001, minus, piece 0x00000004
 source_filename = "minus.c"
 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-apple-macosx10.12.0"

Modified: llvm/trunk/test/DebugInfo/X86/fission-ranges.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/fission-ranges.ll?rev=297962&r1=297961&r2=297962&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/fission-ranges.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/fission-ranges.ll Thu Mar 16 11:38:22 2017
@@ -30,16 +30,16 @@
 ; CHECK-NEXT: {{^$}}
 ; CHECK-NEXT:   Beginning address index: 3
 ; CHECK-NEXT:                    Length: 25
-; CHECK-NEXT:      Location description: 50
+; CHECK-NEXT:      Location description: 50 93 04
 ; CHECK: [[E]]: Beginning address index: 4
 ; CHECK-NEXT:                    Length: 19
-; CHECK-NEXT:      Location description: 50
+; CHECK-NEXT:      Location description: 50 93 04
 ; CHECK: [[B]]: Beginning address index: 5
 ; CHECK-NEXT:                    Length: 17
-; CHECK-NEXT:      Location description: 50
+; CHECK-NEXT:      Location description: 50 93 04
 ; CHECK: [[D]]: Beginning address index: 6
 ; CHECK-NEXT:                    Length: 17
-; CHECK-NEXT:      Location description: 50
+; CHECK-NEXT:      Location description: 50 93 04
 
 ; Make sure we don't produce any relocations in any .dwo section (though in particular, debug_info.dwo)
 ; HDR-NOT: .rela.{{.*}}.dwo

Modified: llvm/trunk/test/DebugInfo/X86/single-dbg_value.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/single-dbg_value.ll?rev=297962&r1=297961&r2=297962&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/single-dbg_value.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/single-dbg_value.ll Thu Mar 16 11:38:22 2017
@@ -8,8 +8,8 @@
 ; CHECK-NEXT:   DW_AT_location [DW_FORM_data4]
 ; CHECK-NEXT:   DW_AT_name{{.*}}"a"
 ; CHECK: .debug_loc contents:
-;                               rax
-; CHECK:  Location description: 50
+;                               rax, piece 0x00000004
+; CHECK:  Location description: 50 93 04
 ; SANITY: DBG_VALUE
 ; SANITY-NOT: DBG_VALUE
 ; ModuleID = 'test.ll'

Modified: llvm/trunk/test/DebugInfo/X86/subreg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/subreg.ll?rev=297962&r1=297961&r2=297962&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/subreg.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/subreg.ll Thu Mar 16 11:38:22 2017
@@ -4,9 +4,8 @@
 ; being in its superregister.
 
 ; CHECK: .byte   80                      # super-register DW_OP_reg0
-; No need to a piece at offset 0.
-; CHECK-NOT: DW_OP_piece
-; CHECK-NOT: DW_OP_bit_piece
+; CHECK-NEXT: .byte   147                # DW_OP_piece
+; CHECK-NEXT: .byte   2                  # 2
 
 define i16 @f(i16 signext %zzz) nounwind !dbg !1 {
 entry:

Modified: llvm/trunk/test/DebugInfo/X86/subregisters.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/subregisters.ll?rev=297962&r1=297961&r2=297962&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/subregisters.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/subregisters.ll Thu Mar 16 11:38:22 2017
@@ -2,7 +2,7 @@
 ; RUN: llvm-dwarfdump %t.o | FileCheck %s
 ;
 ; Test that on x86_64, the 32-bit subregister esi is emitted as
-; subregister of the 64-bit rsi.
+; DW_OP_piece 32 of the 64-bit rsi.
 ;
 ; rdar://problem/16015314
 ;
@@ -11,8 +11,8 @@
 ; CHECK-NEXT:  DW_AT_location [DW_FORM_data4]	(0x00000000)
 ; CHECK-NEXT:  DW_AT_name [DW_FORM_strp]{{.*}} "a"
 ; CHECK: .debug_loc contents:
-;                                    rsi
-; CHECK:       Location description: 54
+;                                    rsi, piece 0x00000004
+; CHECK:       Location description: 54 93 04 
 ;
 ; struct bar {
 ;   int a;




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