[llvm] r297932 - Fixing typos.

[Oren Ben Simhon via llvm-commits]

Author: orenb
Date: Thu Mar 16 03:15:52 2017
New Revision: 297932

URL: http://llvm.org/viewvc/llvm-project?rev=297932&view=rev
Log:
Fixing typos.


Modified:
    llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h
    llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp

Modified: llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h?rev=297932&r1=297931&r2=297932&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h Thu Mar 16 03:15:52 2017
@@ -75,12 +75,11 @@ private:
 
   /// The flag is true upon \p UpdatedCSRs initialization
   /// and false otherwise.
-  bool IsUpdatedCSRsInitizialied;
+  bool IsUpdatedCSRsInitialized;
 
   /// Contains the updated callee saved register list.
   /// As opposed to the static list defined in register info,
-  /// all registers that were disabled (in CalleeSaveDisableRegs)
-  /// are removed from the list.
+  /// all registers that were disabled are removed from the list.
   SmallVector<MCPhysReg, 16> UpdatedCSRs;
 
   /// RegAllocHints - This vector records register allocation hints for virtual

Modified: llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp?rev=297932&r1=297931&r2=297932&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp Thu Mar 16 03:15:52 2017
@@ -44,7 +44,7 @@ void MachineRegisterInfo::Delegate::anch
 MachineRegisterInfo::MachineRegisterInfo(MachineFunction *MF)
     : MF(MF), TracksSubRegLiveness(MF->getSubtarget().enableSubRegLiveness() &&
                                    EnableSubRegLiveness),
-      IsUpdatedCSRsInitizialied(false) {
+      IsUpdatedCSRsInitialized(false) {
   unsigned NumRegs = getTargetRegisterInfo()->getNumRegs();
   VRegInfo.reserve(256);
   RegAllocHints.reserve(256);
@@ -564,7 +564,7 @@ void MachineRegisterInfo::disableCalleeS
   assert(Reg && (Reg < TRI->getNumRegs()) &&
          "Trying to disable an invalid register");
 
-  if (!IsUpdatedCSRsInitizialied) {
+  if (!IsUpdatedCSRsInitialized) {
     const MCPhysReg *CSR = TRI->getCalleeSavedRegs(MF);
     for (const MCPhysReg *I = CSR; *I; ++I)
       UpdatedCSRs.push_back(*I);
@@ -573,7 +573,7 @@ void MachineRegisterInfo::disableCalleeS
     // (no more registers should be pushed).
     UpdatedCSRs.push_back(0);
 
-    IsUpdatedCSRsInitizialied = true;
+    IsUpdatedCSRsInitialized = true;
   }
 
   // Remove the register (and its aliases from the list).
@@ -583,8 +583,9 @@ void MachineRegisterInfo::disableCalleeS
 }
 
 const MCPhysReg *MachineRegisterInfo::getCalleeSavedRegs() const {
-  if (IsUpdatedCSRsInitizialied)
+  if (IsUpdatedCSRsInitialized)
     return UpdatedCSRs.data();
 
   return getTargetRegisterInfo()->getCalleeSavedRegs(MF);
 }
+