[llvm] r297842 - Revert "[Thumb1] Fix the bug when adding/subtracting -2147483648"

[Artyom Skrobov via llvm-commits]

Author: askrobov
Date: Wed Mar 15 09:50:43 2017
New Revision: 297842

URL: http://llvm.org/viewvc/llvm-project?rev=297842&view=rev
Log:
Revert "[Thumb1] Fix the bug when adding/subtracting -2147483648"

This reverts r297820 which apparently fails on A15 hosts.

Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
    llvm/trunk/test/CodeGen/Thumb/long.ll

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=297842&r1=297841&r2=297842&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Wed Mar 15 09:50:43 2017
@@ -9788,8 +9788,8 @@ static SDValue PerformAddcSubcCombine(SD
   if (Subtarget->isThumb1Only()) {
     SDValue RHS = N->getOperand(1);
     if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(RHS)) {
-      int32_t imm = C->getSExtValue();
-      if (-imm > 0) {
+      int64_t imm = C->getSExtValue();
+      if (imm < 0) {
         SDLoc DL(N);
         RHS = DAG.getConstant(-imm, DL, MVT::i32);
         unsigned Opcode = (N->getOpcode() == ARMISD::ADDC) ? ARMISD::SUBC
@@ -9806,8 +9806,8 @@ static SDValue PerformAddeSubeCombine(SD
   if (Subtarget->isThumb1Only()) {
     SDValue RHS = N->getOperand(1);
     if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(RHS)) {
-      int32_t imm = C->getSExtValue();
-      if (-imm > 0) {
+      int64_t imm = C->getSExtValue();
+      if (imm < 0) {
         SDLoc DL(N);
 
         // The with-carry-in form matches bitwise not instead of the negation.

Modified: llvm/trunk/test/CodeGen/Thumb/long.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb/long.ll?rev=297842&r1=297841&r2=297842&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb/long.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb/long.ll Wed Mar 15 09:50:43 2017
@@ -194,15 +194,3 @@ entry:
 ; CHECK: movs r1, r3
 }
 
-; "sub 2147483648" has to be lowered into "add -2147483648"
-define i64 @f12(i64 %x, i64 %y) {
-entry:
-        %tmp1 = sub i64 %x, 2147483648
-        ret i64 %tmp1
-; CHECK-LABEL: f12:
-; CHECK: movs r2, #1
-; CHECK: lsls r2, r2, #31
-; CHECK: movs r3, #0
-; CHECK: adds r0, r0, r2
-; CHECK: sbcs r1, r3
-}