[PATCH] D30941: Better testing of schedule model instruction latencies/throughputs

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: lib/Target/X86/InstPrinter/X86InstComments.h:22
+    AC_EVEX_2_VEX = 0x2, // For instr that was compressed from EVEX to VEX.
+    PRINT_LATENCY = 0x4
   };
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Style guide - AC_PRINT_LATENCY


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Comment at: test/CodeGen/X86/recip-fastmath2.ll:20
+; SSE-NEXT:    movaps %xmm1, %xmm0
+;
+; AVX-RECIP-LABEL: f32_no_estimate_2:
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Where have the retq instructions gone? 


https://reviews.llvm.org/D30941