[PATCH] D30247: Epilog loop vectorization

[Hal Finkel via Phabricator via llvm-commits]

hfinkel added a comment.

After this patch was posted, there was an RFC discussion regarding approach. We discussed, for example, just adding metadata (or keeping similar state) to restrict VF and rerunning the vectorizer to vectorize the epilogue loop. Can you please summarize that discussion and how it relates to what's here? Did the design of this patch change as a result of that discussion? If not, why not?



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Comment at: include/llvm/Transforms/Utils/LoopVersioning.h:151
+  // Minimal expectation is Loop should have a pre header & single exit block.
+  bool AssumeLoopSimplifyForm;
 };
----------------
I don't see why this variable is needed. It only seems to be used to adjust the assert. I see no problem with relaxing the required loop conditions, but I think that you should just relax them and document what they are.


Repository:
  rL LLVM

https://reviews.llvm.org/D30247