[PATCH] D30826: [DAG] vector div/rem with any zero element in divisor is undef

[Eli Friedman via Phabricator via llvm-commits]

efriedma accepted this revision.
efriedma added a comment.
This revision is now accepted and ready to land.

LGTM with a minor tweak.



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Comment at: include/llvm/CodeGen/SelectionDAG.h:744
+  /// For the given opcode and operand values, return true if any operand value
+  /// makes this operation undefined.
+  bool isUndef(unsigned Opcode, ArrayRef<SDValue> Ops);
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This is a little unclear... maybe "return true if the result of this operation is always undefined"?


https://reviews.llvm.org/D30826