[llvm] r297666 - GlobalISel: move vector extract/insert inside generic opcode region.

Ahmed Bougacha via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 13 14:33:55 PDT 2017


I think you need to revert r297663 now ;)
-Ahmed


On Mon, Mar 13, 2017 at 2:19 PM, Tim Northover via llvm-commits
<llvm-commits at lists.llvm.org> wrote:
> Author: tnorthover
> Date: Mon Mar 13 16:18:59 2017
> New Revision: 297666
>
> URL: http://llvm.org/viewvc/llvm-project?rev=297666&view=rev
> Log:
> GlobalISel: move vector extract/insert inside generic opcode region.
>
> Otherwise they won't be legalized or selected, causing instruction selection to
> fail horribly.
>
> Modified:
>     llvm/trunk/include/llvm/Target/TargetOpcodes.def
>     llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
>
> Modified: llvm/trunk/include/llvm/Target/TargetOpcodes.def
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetOpcodes.def?rev=297666&r1=297665&r2=297666&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/Target/TargetOpcodes.def (original)
> +++ llvm/trunk/include/llvm/Target/TargetOpcodes.def Mon Mar 13 16:18:59 2017
> @@ -392,15 +392,17 @@ HANDLE_TARGET_OPCODE(G_GEP)
>  /// *down* to the given alignment.
>  HANDLE_TARGET_OPCODE(G_PTR_MASK)
>
> -/// Generic BRANCH instruction. This is an unconditional branch.
> -HANDLE_TARGET_OPCODE(G_BR)
> -
>  /// Generic insertelement.
>  HANDLE_TARGET_OPCODE(G_INSERT_VECTOR_ELT)
>
>  /// Generic extractelement.
>  HANDLE_TARGET_OPCODE(G_EXTRACT_VECTOR_ELT)
>
> +/// Generic BRANCH instruction. This is an unconditional branch.
> +HANDLE_TARGET_OPCODE(G_BR)
> +// WARNING: make sure you update the PRE_ISEL_GENERIC_OPCODE_END if you put
> +// anything after G_BR!!! Better yet, don't.
> +
>  // TODO: Add more generic opcodes as we move along.
>
>  /// Marker for the end of the generic opcode.
>
> Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll?rev=297666&r1=297665&r2=297666&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll (original)
> +++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll Mon Mar 13 16:18:59 2017
> @@ -138,3 +138,12 @@ broken:
>  continue:
>    ret void
>  }
> +
> +; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: {{.*}} G_EXTRACT_VECTOR
> +; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for unhandled_extract
> +; FALLBACK-WITH-REPORT-OUT-LABEL: unhandled_extract:
> +define i32 @unhandled_extract(<2 x i32> %in, i64 %elt) {
> +  %tmp = extractelement <2 x i32> %in, i64 %elt
> +  %res = add i32 %tmp, 1
> +  ret i32 %res
> +}
>
>
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