[llvm] r297599 - [AVX-512] Use sse_load_f64/f32 in VCVTSS2SI/VCVTSD2SI patterns.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sun Mar 12 20:59:07 PDT 2017
Author: ctopper
Date: Sun Mar 12 22:59:06 2017
New Revision: 297599
URL: http://llvm.org/viewvc/llvm-project?rev=297599&view=rev
Log:
[AVX-512] Use sse_load_f64/f32 in VCVTSS2SI/VCVTSD2SI patterns.
Modified:
llvm/trunk/lib/Target/X86/X86InstrAVX512.td
Modified: llvm/trunk/lib/Target/X86/X86InstrAVX512.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrAVX512.td?rev=297599&r1=297598&r2=297599&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrAVX512.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrAVX512.td Sun Mar 12 22:59:06 2017
@@ -5854,10 +5854,10 @@ multiclass avx512_cvt_s_int_round<bits<8
!strconcat(asm,"\t{$rc, $src, $dst|$dst, $src, $rc}"),
[(set DstVT.RC:$dst, (OpNode (SrcVT.VT SrcVT.RC:$src),(i32 imm:$rc)))]>,
EVEX, VEX_LIG, EVEX_B, EVEX_RC;
- def rm : SI<opc, MRMSrcMem, (outs DstVT.RC:$dst), (ins SrcVT.ScalarMemOp:$src),
+ def rm : SI<opc, MRMSrcMem, (outs DstVT.RC:$dst), (ins SrcVT.IntScalarMemOp:$src),
!strconcat(asm,"\t{$src, $dst|$dst, $src}"),
[(set DstVT.RC:$dst, (OpNode
- (SrcVT.VT (scalar_to_vector (SrcVT.ScalarLdFrag addr:$src))),
+ (SrcVT.VT SrcVT.ScalarIntMemCPat:$src),
(i32 FROUND_CURRENT)))]>,
EVEX, VEX_LIG;
} // Predicates = [HasAVX512]
@@ -5894,20 +5894,20 @@ defm VCVTSD2USI64Z: avx512_cvt_s_int_rou
let Predicates = [HasAVX512] in {
def : Pat<(i32 (int_x86_sse_cvtss2si (v4f32 VR128X:$src))),
(VCVTSS2SIZrr VR128X:$src)>;
- def : Pat<(i32 (int_x86_sse_cvtss2si (sse_load_f32 addr:$src))),
- (VCVTSS2SIZrm addr:$src)>;
+ def : Pat<(i32 (int_x86_sse_cvtss2si sse_load_f32:$src)),
+ (VCVTSS2SIZrm sse_load_f32:$src)>;
def : Pat<(i64 (int_x86_sse_cvtss2si64 (v4f32 VR128X:$src))),
(VCVTSS2SI64Zrr VR128X:$src)>;
- def : Pat<(i64 (int_x86_sse_cvtss2si64 (sse_load_f32 addr:$src))),
- (VCVTSS2SI64Zrm addr:$src)>;
+ def : Pat<(i64 (int_x86_sse_cvtss2si64 sse_load_f32:$src)),
+ (VCVTSS2SI64Zrm sse_load_f32:$src)>;
def : Pat<(i32 (int_x86_sse2_cvtsd2si (v2f64 VR128X:$src))),
(VCVTSD2SIZrr VR128X:$src)>;
- def : Pat<(i32 (int_x86_sse2_cvtsd2si (sse_load_f64 addr:$src))),
- (VCVTSD2SIZrm addr:$src)>;
+ def : Pat<(i32 (int_x86_sse2_cvtsd2si sse_load_f64:$src)),
+ (VCVTSD2SIZrm sse_load_f64:$src)>;
def : Pat<(i64 (int_x86_sse2_cvtsd2si64 (v2f64 VR128X:$src))),
(VCVTSD2SI64Zrr VR128X:$src)>;
- def : Pat<(i64 (int_x86_sse2_cvtsd2si64 (sse_load_f64 addr:$src))),
- (VCVTSD2SI64Zrm addr:$src)>;
+ def : Pat<(i64 (int_x86_sse2_cvtsd2si64 sse_load_f64:$src)),
+ (VCVTSD2SI64Zrm sse_load_f64:$src)>;
} // HasAVX512
let Predicates = [HasAVX512] in {
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