[llvm] r297526 - [RDF] Remove the map of reaching defs from copy propagation
Krzysztof Parzyszek via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 10 14:44:25 PST 2017
Author: kparzysz
Date: Fri Mar 10 16:44:24 2017
New Revision: 297526
URL: http://llvm.org/viewvc/llvm-project?rev=297526&view=rev
Log:
[RDF] Remove the map of reaching defs from copy propagation
Use Liveness::getNearestAliasedRef to find the reaching def instead.
Modified:
llvm/trunk/lib/Target/Hexagon/RDFCopy.cpp
llvm/trunk/lib/Target/Hexagon/RDFCopy.h
llvm/trunk/test/CodeGen/Hexagon/pred-absolute-store.ll
Modified: llvm/trunk/lib/Target/Hexagon/RDFCopy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/RDFCopy.cpp?rev=297526&r1=297525&r2=297526&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/RDFCopy.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/RDFCopy.cpp Fri Mar 10 16:44:24 2017
@@ -11,6 +11,7 @@
#include "RDFCopy.h"
#include "RDFGraph.h"
+#include "RDFLiveness.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineInstr.h"
@@ -53,47 +54,12 @@ bool CopyPropagation::interpretAsCopy(co
void CopyPropagation::recordCopy(NodeAddr<StmtNode*> SA, EqualityMap &EM) {
CopyMap.insert(std::make_pair(SA.Id, EM));
Copies.push_back(SA.Id);
-
- for (auto I : EM) {
- auto FS = DefM.find(I.second.Reg);
- if (FS == DefM.end() || FS->second.empty())
- continue; // Undefined source
- RDefMap[I.second][SA.Id] = FS->second.top()->Id;
- // Insert DstR into the map.
- RDefMap[I.first];
- }
-}
-
-
-void CopyPropagation::updateMap(NodeAddr<InstrNode*> IA) {
- RegisterSet RRs;
- for (NodeAddr<RefNode*> RA : IA.Addr->members(DFG))
- RRs.insert(RA.Addr->getRegRef(DFG));
- bool Common = false;
- for (auto &R : RDefMap) {
- if (!RRs.count(R.first))
- continue;
- Common = true;
- break;
- }
- if (!Common)
- return;
-
- for (auto &R : RDefMap) {
- if (!RRs.count(R.first))
- continue;
- auto F = DefM.find(R.first.Reg);
- if (F == DefM.end() || F->second.empty())
- continue;
- R.second[IA.Id] = F->second.top()->Id;
- }
}
bool CopyPropagation::scanBlock(MachineBasicBlock *B) {
bool Changed = false;
auto BA = DFG.getFunc().Addr->findBlock(B, DFG);
- DFG.markBlock(BA.Id, DefM);
for (NodeAddr<InstrNode*> IA : BA.Addr->members(DFG)) {
if (DFG.IsCode<NodeAttrs::Stmt>(IA)) {
@@ -102,20 +68,30 @@ bool CopyPropagation::scanBlock(MachineB
if (interpretAsCopy(SA.Addr->getCode(), EM))
recordCopy(SA, EM);
}
-
- updateMap(IA);
- DFG.pushAllDefs(IA, DefM);
}
MachineDomTreeNode *N = MDT.getNode(B);
for (auto I : *N)
Changed |= scanBlock(I->getBlock());
- DFG.releaseBlock(BA.Id, DefM);
return Changed;
}
+NodeId CopyPropagation::getLocalReachingDef(RegisterRef RefRR,
+ NodeAddr<InstrNode*> IA) {
+ NodeAddr<RefNode*> RA = L.getNearestAliasedRef(RefRR, IA);
+ if (RA.Id != 0) {
+ if (RA.Addr->getKind() == NodeAttrs::Def)
+ return RA.Id;
+ assert(RA.Addr->getKind() == NodeAttrs::Use);
+ if (NodeId RD = RA.Addr->getReachingDef())
+ return RD;
+ }
+ return 0;
+}
+
+
bool CopyPropagation::run() {
scanBlock(&DFG.getMF().front());
@@ -129,14 +105,6 @@ bool CopyPropagation::run() {
<< Print<RegisterRef>(J.second, DFG);
dbgs() << " }\n";
}
- dbgs() << "\nRDef map:\n";
- for (auto R : RDefMap) {
- dbgs() << Print<RegisterRef>(R.first, DFG) << " -> {";
- for (auto &M : R.second)
- dbgs() << ' ' << Print<NodeId>(M.first, DFG) << ':'
- << Print<NodeId>(M.second, DFG);
- dbgs() << " }\n";
- }
}
bool Changed = false;
@@ -176,8 +144,7 @@ bool CopyPropagation::run() {
if (DR == SR)
continue;
- auto &RDefSR = RDefMap[SR];
- NodeId RDefSR_SA = RDefSR[SA.Id];
+ NodeId AtCopy = getLocalReachingDef(SR, SA);
for (NodeId N = DA.Addr->getReachedUse(), NextN; N; N = NextN) {
auto UA = DFG.addr<UseNode*>(N);
@@ -190,7 +157,8 @@ bool CopyPropagation::run() {
NodeAddr<InstrNode*> IA = UA.Addr->getOwner(DFG);
assert(DFG.IsCode<NodeAttrs::Stmt>(IA));
- if (RDefSR[IA.Id] != RDefSR_SA)
+ NodeId AtUse = getLocalReachingDef(SR, IA);
+ if (AtCopy != AtUse)
continue;
MachineOperand &Op = UA.Addr->getOp();
@@ -206,8 +174,8 @@ bool CopyPropagation::run() {
Op.setReg(NewReg);
Op.setSubReg(0);
DFG.unlinkUse(UA, false);
- if (RDefSR_SA != 0) {
- UA.Addr->linkToDef(UA.Id, DFG.addr<DefNode*>(RDefSR_SA));
+ if (AtCopy != 0) {
+ UA.Addr->linkToDef(UA.Id, DFG.addr<DefNode*>(AtCopy));
} else {
UA.Addr->setReachingDef(0);
UA.Addr->setSibling(0);
Modified: llvm/trunk/lib/Target/Hexagon/RDFCopy.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/RDFCopy.h?rev=297526&r1=297525&r2=297526&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/RDFCopy.h (original)
+++ llvm/trunk/lib/Target/Hexagon/RDFCopy.h Fri Mar 10 16:44:24 2017
@@ -11,6 +11,9 @@
#define LLVM_LIB_TARGET_HEXAGON_RDFCOPY_H
#include "RDFGraph.h"
+#include "RDFLiveness.h"
+#include "llvm/CodeGen/MachineFunction.h"
+
#include <map>
#include <vector>
@@ -24,7 +27,7 @@ namespace rdf {
struct CopyPropagation {
CopyPropagation(DataFlowGraph &dfg) : MDT(dfg.getDT()), DFG(dfg),
- Trace(false) {}
+ L(dfg.getMF().getRegInfo(), dfg), Trace(false) {}
virtual ~CopyPropagation() = default;
@@ -39,18 +42,16 @@ namespace rdf {
private:
const MachineDominatorTree &MDT;
DataFlowGraph &DFG;
- DataFlowGraph::DefStackMap DefM;
+ Liveness L;
bool Trace;
- // map: register -> (map: stmt -> reaching def)
- std::map<RegisterRef,std::map<NodeId,NodeId>> RDefMap;
// map: statement -> (map: dst reg -> src reg)
std::map<NodeId, EqualityMap> CopyMap;
std::vector<NodeId> Copies;
void recordCopy(NodeAddr<StmtNode*> SA, EqualityMap &EM);
- void updateMap(NodeAddr<InstrNode*> IA);
bool scanBlock(MachineBasicBlock *B);
+ NodeId getLocalReachingDef(RegisterRef RefRR, NodeAddr<InstrNode*> IA);
};
} // end namespace rdf
Modified: llvm/trunk/test/CodeGen/Hexagon/pred-absolute-store.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/pred-absolute-store.ll?rev=297526&r1=297525&r2=297526&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/pred-absolute-store.ll (original)
+++ llvm/trunk/test/CodeGen/Hexagon/pred-absolute-store.ll Fri Mar 10 16:44:24 2017
@@ -1,7 +1,7 @@
; RUN: llc -march=hexagon < %s | FileCheck %s
-; Check that we are able to predicate instructions with abosolute
+; Check that we are able to predicate instructions with absolute
; addressing mode.
-; CHECK: if ({{!*}}p{{[0-2]}}.new) memw(##gvar) = r{{[0-9]+}}
+; CHECK: if ({{!?}}p{{[0-3]}}) memw(##gvar) = r{{[0-9]+}}
@gvar = external global i32
define i32 @test2(i32 %a, i32 %b) nounwind {
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