[llvm] r297372 - [mips] Fix return lowering

[Simon Dardis via llvm-commits]

Author: sdardis
Date: Thu Mar  9 05:19:48 2017
New Revision: 297372

URL: http://llvm.org/viewvc/llvm-project?rev=297372&view=rev
Log:
[mips] Fix return lowering

Fix a machine verifier issue where a instruction was using a invalid
register. The return pseudo is expanded and has the return address
register added to it. The return register may have been spuriously
mark as killed earlier.

This partially resolves PR/27458

Thanks to Quentin Colombet for reporting the issue!


Modified:
    llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.cpp
    llvm/trunk/test/CodeGen/Mips/return_address.ll
    llvm/trunk/test/CodeGen/Mips/tnaked.ll

Modified: llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.cpp?rev=297372&r1=297371&r2=297372&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.cpp Thu Mar  9 05:19:48 2017
@@ -540,11 +540,20 @@ unsigned MipsSEInstrInfo::getAnalyzableB
 
 void MipsSEInstrInfo::expandRetRA(MachineBasicBlock &MBB,
                                   MachineBasicBlock::iterator I) const {
+
+  MachineInstrBuilder MIB;
   if (Subtarget.isGP64bit())
-    BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn64))
-        .addReg(Mips::RA_64);
+    MIB = BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn64))
+              .addReg(Mips::RA_64, RegState::Undef);
   else
-    BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn)).addReg(Mips::RA);
+    MIB = BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn))
+              .addReg(Mips::RA, RegState::Undef);
+
+  // Retain any imp-use flags.
+  for (auto & MO : I->operands()) {
+    if (MO.isImplicit())
+      MIB.add(MO);
+  }
 }
 
 void MipsSEInstrInfo::expandERet(MachineBasicBlock &MBB,

Modified: llvm/trunk/test/CodeGen/Mips/return_address.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/return_address.ll?rev=297372&r1=297371&r2=297372&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/return_address.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/return_address.ll Thu Mar  9 05:19:48 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=mipsel < %s | FileCheck %s
+; RUN: llc -march=mipsel -verify-machineinstrs < %s | FileCheck %s
 
 define i8* @f1() nounwind {
 entry:

Modified: llvm/trunk/test/CodeGen/Mips/tnaked.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/tnaked.ll?rev=297372&r1=297371&r2=297372&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/tnaked.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/tnaked.ll Thu Mar  9 05:19:48 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=mipsel < %s | FileCheck %s
+; RUN: llc -march=mipsel < %s -verify-machineinstrs | FileCheck %s
 
 
 define void @tnaked() #0 {