[PATCH] D30744: Improve machine schedulers for in-order processors

[Javed Absar via Phabricator via llvm-commits]

javed.absar added a comment.

Hi Matthias:

The single-issue restriction is on the instruction and not a limitation of the ProcResource e.g.  for some processor, a load using load/store unit may be allowed dual-issue, but VLDx using the same load/store unit may not be allowed to dual-issue.


https://reviews.llvm.org/D30744