[llvm] r297301 - [GlobalISel] Add default action for G_FNEG
Volkan Keles via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 8 10:09:15 PST 2017
Author: volkan
Date: Wed Mar 8 12:09:14 2017
New Revision: 297301
URL: http://llvm.org/viewvc/llvm-project?rev=297301&view=rev
Log:
[GlobalISel] Add default action for G_FNEG
Summary: rL297171 introduced G_FNEG for floating-point negation instruction and IRTranslator started to translate `FSUB -0.0, X` to `FNEG X`. This patch adds a default action for G_FNEG to avoid breaking existing targets.
Reviewers: qcolombet, ab, kristof.beyls, t.p.northover, aditya_nandakumar, dsanders
Reviewed By: qcolombet
Subscribers: dberris, rovka, llvm-commits
Differential Revision: https://reviews.llvm.org/D30721
Added:
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-fneg.mir
Modified:
llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
llvm/trunk/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
Modified: llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp?rev=297301&r1=297300&r2=297301&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp Wed Mar 8 12:09:14 2017
@@ -539,6 +539,38 @@ LegalizerHelper::lower(MachineInstr &MI,
MI.eraseFromParent();
return Legalized;
}
+ case TargetOpcode::G_FNEG: {
+ // TODO: Handle vector types once we are able to
+ // represent them.
+ if (Ty.isVector())
+ return UnableToLegalize;
+ unsigned Res = MI.getOperand(0).getReg();
+ Type *ZeroTy;
+ LLVMContext &Ctx = MIRBuilder.getMF().getFunction()->getContext();
+ switch (Ty.getSizeInBits()) {
+ case 16:
+ ZeroTy = Type::getHalfTy(Ctx);
+ break;
+ case 32:
+ ZeroTy = Type::getFloatTy(Ctx);
+ break;
+ case 64:
+ ZeroTy = Type::getDoubleTy(Ctx);
+ break;
+ default:
+ llvm_unreachable("unexpected floating-point type");
+ }
+ ConstantFP &ZeroForNegation =
+ *cast<ConstantFP>(ConstantFP::getZeroValueForNegation(ZeroTy));
+ unsigned Zero = MRI.createGenericVirtualRegister(Ty);
+ MIRBuilder.buildFConstant(Zero, ZeroForNegation);
+ MIRBuilder.buildInstr(TargetOpcode::G_FSUB)
+ .addDef(Res)
+ .addUse(Zero)
+ .addUse(MI.getOperand(1).getReg());
+ MI.eraseFromParent();
+ return Legalized;
+ }
}
}
Modified: llvm/trunk/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/LegalizerInfo.cpp?rev=297301&r1=297300&r2=297301&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/LegalizerInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/LegalizerInfo.cpp Wed Mar 8 12:09:14 2017
@@ -42,6 +42,7 @@ LegalizerInfo::LegalizerInfo() : TablesI
DefaultActions[TargetOpcode::G_BRCOND] = WidenScalar;
DefaultActions[TargetOpcode::G_INSERT] = NarrowScalar;
+ DefaultActions[TargetOpcode::G_FNEG] = Lower;
}
void LegalizerInfo::computeTables() {
@@ -96,6 +97,9 @@ LegalizerInfo::getAction(const InstrAspe
if (DefaultAction != DefaultActions.end() && DefaultAction->second == Legal)
return std::make_pair(Legal, Ty);
+ if (DefaultAction != DefaultActions.end() && DefaultAction->second == Lower)
+ return std::make_pair(Lower, Ty);
+
if (DefaultAction == DefaultActions.end() ||
DefaultAction->second != NarrowScalar)
return std::make_pair(Unsupported, LLT());
Added: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-fneg.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-fneg.mir?rev=297301&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-fneg.mir (added)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-fneg.mir Wed Mar 8 12:09:14 2017
@@ -0,0 +1,48 @@
+# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
+
+--- |
+ target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
+ target triple = "aarch64--"
+ define void @test_fneg_f32() {
+ entry:
+ ret void
+ }
+ define void @test_fneg_f64() {
+ entry:
+ ret void
+ }
+...
+---
+name: test_fneg_f32
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+body: |
+ bb.1:
+ liveins: %s0
+ ; CHECK-LABEL: name: test_fneg_f32
+ ; CHECK: [[VAR:%[0-9]+]](s32) = COPY %s0
+ ; CHECK: [[ZERO:%[0-9]+]](s32) = G_FCONSTANT float -0.000000e+00
+ ; CHECK: [[RES:%[0-9]+]](s32) = G_FSUB [[ZERO]], [[VAR]]
+ ; CHECK: %s0 = COPY [[RES]](s32)
+ %0(s32) = COPY %s0
+ %1(s32) = G_FNEG %0
+ %s0 = COPY %1(s32)
+...
+---
+name: test_fneg_f64
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+body: |
+ bb.1:
+ liveins: %d0
+ ; CHECK-LABEL: name: test_fneg_f64
+ ; CHECK: [[VAR:%[0-9]+]](s64) = COPY %d0
+ ; CHECK: [[ZERO:%[0-9]+]](s64) = G_FCONSTANT double -0.000000e+00
+ ; CHECK: [[RES:%[0-9]+]](s64) = G_FSUB [[ZERO]], [[VAR]]
+ ; CHECK: %d0 = COPY [[RES]](s64)
+ %0(s64) = COPY %d0
+ %1(s64) = G_FNEG %0
+ %d0 = COPY %1(s64)
+...
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