[PATCH] D30665: [InstSimplify] vector div/rem with any zero element in divisor is undef

[Michael Kuperstein via Phabricator via llvm-commits]

mkuper added a comment.

In https://reviews.llvm.org/D30665#693613, @efriedma wrote:

> > Would that mean that this transformation (very naive SLP vectorization) would become illegal:
>
> Why would that be illegal?  Both snippets have undefined behavior if and only if y1 or y2 is zero (or undef, or poison).


Er, right, bad example. Let me think if I have a good one. What I'm aiming at is that I don't want to propagate undef from a lane that's never used into a lane that's actually used.


https://reviews.llvm.org/D30665