[llvm] r297026 - [DAGCombiner] simplify div/rem-by-0

Friedman, Eli via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 6 10:19:53 PST 2017


On 3/6/2017 9:45 AM, Sanjay Patel wrote:
> Thanks, Eli!
>
> No objections that this doesn't solve the motivating problem or that 
> the ordering is bogus. I was planning to address that next, but your 
> suggestion to snuff this out in FoldConstantArithmetic does seem 
> better. Let me check the related handling in IR and see if we can do 
> better across the board.
>
> About vectors: I thought we are not allowed to assume that undef in 
> one lane allows simplification of the whole vector. Ie, undef is not 
> "infectious" across lanes. I can't remember where I last saw that 
> though... Not sure if this would be different in IR vs. DAG?

Unlike other arithmetic operations, sdiv/udiv/srem/urem have undefined 
behavior for some operands.  See 
http://llvm.org/docs/LangRef.html#udiv-instruction .

-Eli

-- 
Employee of Qualcomm Innovation Center, Inc.
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