[PATCH] D30451: [X86][AVX512] Adding new LLVM TableGen backend which generates the EVEX2VEX compressing tables.
Ayman Musa via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 6 00:42:23 PST 2017
aymanmus marked an inline comment as done.
aymanmus added inline comments.
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Comment at: utils/TableGen/X86EVEX2VEXTablesEmitter.cpp:111
+
+ {"VPERMILPDZ128mi", "VPERMILPDmi", true},
+ {"VPERMILPDZ128ri", "VPERMILPDri", true},
----------------
craig.topper wrote:
> What special about VPERMILPD that need to be manually added?
>
> Same question for the BROADCASTs.
They do not accept on the W-bit.
VEX version have WIG0 while EVEX version have WIG1.
================
Comment at: utils/TableGen/X86EVEX2VEXTablesEmitter.cpp:316
+ // (instructions with the same opcode) using function object IsMatch.
+ auto Match = llvm::find_if(VEXInsts[Opcode], IsMatch(EVEXInst));
+ if (Match != VEXInsts[Opcode].end()) {
----------------
craig.topper wrote:
> How does this handle the MAX and MAXC instructions both having the same opcode information?
As I said in the other patch, in this stage of the compiler, there is no difference between MAX and MAXC, so the first to match is picked.
https://reviews.llvm.org/D30451
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