[PATCH] D30469: [PowerPC] Expand compare instructions to equivalent GPR code sequences.

[Hal Finkel via Phabricator via llvm-commits]

hfinkel added inline comments.


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Comment at: lib/Target/PowerPC/PPCInstrInfo.td:3162
+multiclass ExtSetCCPat2<CondCode cc, PatFrag pfrag,
+                       OutPatFrag rfrag, OutPatFrag rfrag8> {
+    def : Pat<(i32 (zext (i1 (pfrag i32:$s1, i32:$s2, cc)))),
----------------
Please indent this by one more space so the O is under the C.


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Comment at: lib/Target/PowerPC/PPCInstrInfo.td:3166
+    def : Pat<(i64 (zext (i1 (pfrag i64:$s1, i64:$s2, cc)))),
+             (rfrag8 $s1, $s2)>;
+    def : Pat<(i64 (zext (i1 (pfrag i32:$s1, i32:$s2, cc)))),
----------------
Indent by one.


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Comment at: lib/Target/PowerPC/PPCInstrInfo.td:3174
+defm : ExtSetCCPat2<SETEQ,
+                   PatFrag<(ops node:$in1, node:$in2, node:$cc),
+                           (setcc $in1, $in2, $cc)>,
----------------
Please indent for the P to be under the S.


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Comment at: lib/Target/PowerPC/PPCInstrInfo.td:3265
 
+// This happens frequently cause ISEL would convert SETLE 0 to SETLT 1.
+defm : ExtSetCCPat<SETLT,
----------------
// This happens frequently because instruction selection will concert SETLE 0 to SETLT 1.

(abbreviating instruction selection as ISEL is confusing in this context because we also have an ISEL instruction).


https://reviews.llvm.org/D30469