[llvm] r296874 - Use APInt::getHighBitsSet instead of APInt::getBitsSet for upper bit mask creation

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Fri Mar  3 08:37:57 2017
New Revision: 296874

URL: http://llvm.org/viewvc/llvm-project?rev=296874&view=rev
Log:
Use APInt::getHighBitsSet instead of APInt::getBitsSet for upper bit mask creation

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=296874&r1=296873&r2=296874&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Mar  3 08:37:57 2017
@@ -7498,7 +7498,7 @@ X86TargetLowering::LowerBUILD_VECTOR(SDV
     // a constant pool load than it is to do a movd + shuffle.
     if (ExtVT == MVT::i64 && !Subtarget.is64Bit() &&
         (!IsAllConstants || Idx == 0)) {
-      if (DAG.MaskedValueIsZero(Item, APInt::getBitsSet(64, 32, 64))) {
+      if (DAG.MaskedValueIsZero(Item, APInt::getHighBitsSet(64, 32))) {
         // Handle SSE only.
         assert(VT == MVT::v2i64 && "Expected an SSE value type!");
         MVT VecVT = MVT::v4i32;