[PATCH] D30542: [ARM] fpscr read/write intrinsics not aware of each other.

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This revision was automatically updated to reflect the committed changes.
Closed by commit rL296865: [ARM] fpscr read/write intrinsics not aware of each other (authored by rsingh).

Changed prior to commit:
  https://reviews.llvm.org/D30542?vs=90450&id=90456#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D30542

Files:
  llvm/trunk/include/llvm/IR/IntrinsicsARM.td
  llvm/trunk/test/CodeGen/ARM/fpscr-intrinsics.ll


Index: llvm/trunk/include/llvm/IR/IntrinsicsARM.td
===================================================================
--- llvm/trunk/include/llvm/IR/IntrinsicsARM.td
+++ llvm/trunk/include/llvm/IR/IntrinsicsARM.td
@@ -67,7 +67,7 @@
 // VFP
 
 def int_arm_get_fpscr : GCCBuiltin<"__builtin_arm_get_fpscr">,
-                       Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>;
+                       Intrinsic<[llvm_i32_ty], [], []>;
 def int_arm_set_fpscr : GCCBuiltin<"__builtin_arm_set_fpscr">,
                        Intrinsic<[], [llvm_i32_ty], []>;
 def int_arm_vcvtr     : Intrinsic<[llvm_float_ty], [llvm_anyfloat_ty],
Index: llvm/trunk/test/CodeGen/ARM/fpscr-intrinsics.ll
===================================================================
--- llvm/trunk/test/CodeGen/ARM/fpscr-intrinsics.ll
+++ llvm/trunk/test/CodeGen/ARM/fpscr-intrinsics.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -O0 -mtriple=armv7-eabi -mcpu=cortex-a8 | FileCheck %s
+; RUN: llc < %s -O3 -mtriple=armv7-eabi -mcpu=cortex-a8 | FileCheck %s
+
+; Function Attrs: nounwind
+define void @fn1(i32* nocapture %p) local_unnamed_addr {
+entry:
+  ; CHECK: vmrs r{{[0-9]+}}, fpscr
+  %0 = tail call i32 @llvm.arm.get.fpscr()
+  store i32 %0, i32* %p, align 4
+  ; CHECK: vmsr fpscr, r{{[0-9]+}}
+  tail call void @llvm.arm.set.fpscr(i32 1)
+  ; CHECK: vmrs r{{[0-9]+}}, fpscr
+  %1 = tail call i32 @llvm.arm.get.fpscr()
+  %arrayidx1 = getelementptr inbounds i32, i32* %p, i32 1
+  store i32 %1, i32* %arrayidx1, align 4
+  ret void
+}
+
+; Function Attrs: nounwind readonly
+declare i32 @llvm.arm.get.fpscr()
+
+; Function Attrs: nounwind writeonly
+declare void @llvm.arm.set.fpscr(i32)


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