[PATCH] D30542: [ARM] fpscr read/write intrinsics not aware of each other.
Ranjeet Singh via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 3 03:14:36 PST 2017
rs updated this revision to Diff 90450.
https://reviews.llvm.org/D30542
Files:
include/llvm/IR/IntrinsicsARM.td
test/CodeGen/ARM/fpscr-intrinsics.ll
Index: test/CodeGen/ARM/fpscr-intrinsics.ll
===================================================================
--- /dev/null
+++ test/CodeGen/ARM/fpscr-intrinsics.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -O0 -mtriple=armv7-eabi -mcpu=cortex-a8 | FileCheck %s
+; RUN: llc < %s -O3 -mtriple=armv7-eabi -mcpu=cortex-a8 | FileCheck %s
+
+; Function Attrs: nounwind
+define void @fn1(i32* nocapture %p) local_unnamed_addr {
+entry:
+ ; CHECK: vmrs r{{[0-9]+}}, fpscr
+ %0 = tail call i32 @llvm.arm.get.fpscr()
+ store i32 %0, i32* %p, align 4
+ ; CHECK: vmsr fpscr, r{{[0-9]+}}
+ tail call void @llvm.arm.set.fpscr(i32 1)
+ ; CHECK: vmrs r{{[0-9]+}}, fpscr
+ %1 = tail call i32 @llvm.arm.get.fpscr()
+ %arrayidx1 = getelementptr inbounds i32, i32* %p, i32 1
+ store i32 %1, i32* %arrayidx1, align 4
+ ret void
+}
+
+; Function Attrs: nounwind readonly
+declare i32 @llvm.arm.get.fpscr()
+
+; Function Attrs: nounwind writeonly
+declare void @llvm.arm.set.fpscr(i32)
Index: include/llvm/IR/IntrinsicsARM.td
===================================================================
--- include/llvm/IR/IntrinsicsARM.td
+++ include/llvm/IR/IntrinsicsARM.td
@@ -67,7 +67,7 @@
// VFP
def int_arm_get_fpscr : GCCBuiltin<"__builtin_arm_get_fpscr">,
- Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>;
+ Intrinsic<[llvm_i32_ty], [], []>;
def int_arm_set_fpscr : GCCBuiltin<"__builtin_arm_set_fpscr">,
Intrinsic<[], [llvm_i32_ty], []>;
def int_arm_vcvtr : Intrinsic<[llvm_float_ty], [llvm_anyfloat_ty],
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