[PATCH] D29587: [DAGCombiner] mulhi + 1 never overflow.

[Amaury SECHET via Phabricator via llvm-commits]

deadalnix updated this revision to Diff 90250.
deadalnix added a comment.

Improve test case


https://reviews.llvm.org/D29587

Files:
  lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  test/CodeGen/X86/overflow.ll


Index: test/CodeGen/X86/overflow.ll
===================================================================
--- test/CodeGen/X86/overflow.ll
+++ test/CodeGen/X86/overflow.ll
@@ -50,10 +50,8 @@
 ; X64-NEXT:    movq %rdi, %rax
 ; X64-NEXT:    mulq %rsi
 ; X64-NEXT:    andl $1, %ecx
-; X64-NEXT:    addq %rdx, %rcx
-; X64-NEXT:    sbbq %rdx, %rdx
-; X64-NEXT:    andl $1, %edx
-; X64-NEXT:    movq %rcx, %rax
+; X64-NEXT:    leaq (%rcx,%rdx), %rax
+; X64-NEXT:    xorl %edx, %edx
 ; X64-NEXT:    retq
   %1 = zext i64 %a to i128
   %2 = zext i64 %b to i128
Index: lib/CodeGen/SelectionDAG/SelectionDAG.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -2775,6 +2775,19 @@
       return OFK_Never;
   }
 
+  // mulhi + 1 never overflow
+  if (N0.getOpcode() == ISD::UMUL_LOHI && N0.getResNo() == 1 &&
+      (~N1Zero & 0x01) == ~N1Zero)
+    return OFK_Never;
+
+  if (N1.getOpcode() == ISD::UMUL_LOHI && N1.getResNo() == 1) {
+    APInt N0Zero, N0One;
+    computeKnownBits(N0, N0Zero, N0One);
+
+    if ((~N0Zero & 0x01) == ~N0Zero)
+      return OFK_Never;
+  }
+
   return OFK_Sometime;
 }
 


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