[llvm] r296710 - [GlobalISel] Add a way for targets to enable GISel.
Ahmed Bougacha via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 1 15:33:08 PST 2017
Author: ab
Date: Wed Mar 1 17:33:08 2017
New Revision: 296710
URL: http://llvm.org/viewvc/llvm-project?rev=296710&view=rev
Log:
[GlobalISel] Add a way for targets to enable GISel.
Until now, we've had to use -global-isel to enable GISel. But using
that on other targets that don't support it will result in an abort, as we
can't build a full pipeline.
Additionally, we want to experiment with enabling GISel by default for
some targets: we can't just enable GISel by default, even among those
target that do have some support, because the level of support varies.
This first step adds an override for the target to explicitly define its
level of support. For AArch64, do that using
a new command-line option (I know..):
-aarch64-enable-global-isel-at-O=<N>
Where N is the opt-level below which GISel should be used.
Default that to -1, so that we still don't enable GISel anywhere.
We're not there yet!
While there, remove a couple LLVM_UNLIKELYs. Building the pipeline is
such a cold path that in practice that shouldn't matter at all.
Added:
llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll
Modified:
llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h
llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
llvm/trunk/lib/CodeGen/TargetPassConfig.cpp
llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp
Modified: llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h?rev=296710&r1=296709&r2=296710&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h (original)
+++ llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h Wed Mar 1 17:33:08 2017
@@ -286,6 +286,10 @@ public:
/// verification is enabled.
void addVerifyPass(const std::string &Banner);
+ /// Check whether or not GlobalISel should be enabled by default.
+ /// Fallback/abort behavior is controlled via other methods.
+ virtual bool isGlobalISelEnabled() const;
+
/// Check whether or not GlobalISel should abort on error.
/// When this is disable, GlobalISel will fall back on SDISel instead of
/// erroring out.
Modified: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp?rev=296710&r1=296709&r2=296710&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (original)
+++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Wed Mar 1 17:33:08 2017
@@ -42,8 +42,8 @@ static cl::opt<cl::boolOrDefault>
EnableFastISelOption("fast-isel", cl::Hidden,
cl::desc("Enable the \"fast\" instruction selector"));
-static cl::opt<bool>
- EnableGlobalISel("global-isel", cl::Hidden, cl::init(false),
+static cl::opt<cl::boolOrDefault>
+ EnableGlobalISel("global-isel", cl::Hidden,
cl::desc("Enable the \"global\" instruction selector"));
void LLVMTargetMachine::initAsmInfo() {
@@ -149,7 +149,9 @@ addPassesToGenerateCode(LLVMTargetMachin
TM->setFastISel(true);
// Ask the target for an isel.
- if (LLVM_UNLIKELY(EnableGlobalISel)) {
+ // Enable GlobalISel if the target wants to, but allow that to be overriden.
+ if (EnableGlobalISel == cl::BOU_TRUE || (EnableGlobalISel == cl::BOU_UNSET &&
+ PassConfig->isGlobalISelEnabled())) {
if (PassConfig->addIRTranslator())
return nullptr;
@@ -177,7 +179,7 @@ addPassesToGenerateCode(LLVMTargetMachin
// Provide a fallback path when we do not want to abort on
// not-yet-supported input.
- if (LLVM_UNLIKELY(!PassConfig->isGlobalISelAbortEnabled()) &&
+ if (!PassConfig->isGlobalISelAbortEnabled() &&
PassConfig->addInstSelector())
return nullptr;
Modified: llvm/trunk/lib/CodeGen/TargetPassConfig.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetPassConfig.cpp?rev=296710&r1=296709&r2=296710&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/TargetPassConfig.cpp (original)
+++ llvm/trunk/lib/CodeGen/TargetPassConfig.cpp Wed Mar 1 17:33:08 2017
@@ -910,6 +910,11 @@ void TargetPassConfig::addBlockPlacement
//===---------------------------------------------------------------------===//
/// GlobalISel Configuration
//===---------------------------------------------------------------------===//
+
+bool TargetPassConfig::isGlobalISelEnabled() const {
+ return false;
+}
+
bool TargetPassConfig::isGlobalISelAbortEnabled() const {
return EnableGlobalISelAbort == 1;
}
Modified: llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp?rev=296710&r1=296709&r2=296710&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp Wed Mar 1 17:33:08 2017
@@ -139,6 +139,11 @@ static cl::opt<bool>
cl::desc("Enable the loop data prefetch pass"),
cl::init(true));
+static cl::opt<int> EnableGlobalISelAtO(
+ "aarch64-enable-global-isel-at-O", cl::Hidden,
+ cl::desc("Enable GlobalISel at or below an opt level (-1 to disable)"),
+ cl::init(-1));
+
extern "C" void LLVMInitializeAArch64Target() {
// Register the target.
RegisterTargetMachine<AArch64leTargetMachine> X(getTheAArch64leTarget());
@@ -358,6 +363,8 @@ public:
void addPostRegAlloc() override;
void addPreSched2() override;
void addPreEmitPass() override;
+
+ bool isGlobalISelEnabled() const override;
};
} // end anonymous namespace
@@ -467,6 +474,10 @@ bool AArch64PassConfig::addGlobalInstruc
}
#endif
+bool AArch64PassConfig::isGlobalISelEnabled() const {
+ return TM->getOptLevel() <= EnableGlobalISelAtO;
+}
+
bool AArch64PassConfig::addILPOpts() {
if (EnableCondOpt)
addPass(createAArch64ConditionOptimizerPass());
Added: llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll?rev=296710&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll (added)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll Wed Mar 1 17:33:08 2017
@@ -0,0 +1,48 @@
+; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN: -O0 -aarch64-enable-global-isel-at-O=0 \
+; RUN: | FileCheck %s --check-prefix ENABLED --check-prefix NOFALLBACK
+
+; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN: -O0 -aarch64-enable-global-isel-at-O=0 -global-isel-abort=2 \
+; RUN: | FileCheck %s --check-prefix ENABLED --check-prefix FALLBACK
+
+; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN: -global-isel \
+; RUN: | FileCheck %s --check-prefix ENABLED --check-prefix NOFALLBACK
+
+; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN: -global-isel -global-isel-abort=2 \
+; RUN: | FileCheck %s --check-prefix ENABLED --check-prefix FALLBACK
+
+; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN: -O1 -aarch64-enable-global-isel-at-O=3 \
+; RUN: | FileCheck %s --check-prefix ENABLED
+
+; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN: -O1 -aarch64-enable-global-isel-at-O=0 \
+; RUN: | FileCheck %s --check-prefix DISABLED
+
+; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN: -aarch64-enable-global-isel-at-O=-1 \
+; RUN: | FileCheck %s --check-prefix DISABLED
+
+; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN: | FileCheck %s --check-prefix DISABLED
+
+; ENABLED: IRTranslator
+; ENABLED-NEXT: Legalizer
+; ENABLED-NEXT: RegBankSelect
+; ENABLED-NEXT: InstructionSelect
+; ENABLED-NEXT: ResetMachineFunction
+
+; FALLBACK: AArch64 Instruction Selection
+; NOFALLBACK-NOT: AArch64 Instruction Selection
+
+; DISABLED-NOT: IRTranslator
+
+; DISABLED: AArch64 Instruction Selection
+; DISABLED: Expand ISel Pseudo-instructions
+
+define void @empty() {
+ ret void
+}
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