[PATCH] D29489: Optimize SETCC + VSEL of incompatible or illegal types

[Jonas Paulsson via Phabricator via llvm-commits]

jonpa updated this revision to Diff 90149.
jonpa added a comment.

> You're making this substantially worse because i1 vectors are legal in avx-512, so you're forcing unnatural transforms.

Aha.
I would then expect getSetCCResultType() to return a vector of i1's. But since v32i1 is not a simple type, v32i32 is returned instead. So I had to split the VT and then check, and if a i1-vector then is returned from getSetCCResultType(), abort. I added this check to the new method.

I found that there still was a slight diff, because earlier the DAGCombiner split a VSELECT and VSETCC by making two new narrow SETCCs. The DAGTypeLegalizer instead just splits the SETCC's result vector. When I changed this behaviour so that it instead does what DAGCombiner used to do, the regression disappears. This is done by SplitVSETCC(), which is copied from DAGCombiner. I suppose it should go in as a common utility function somewhere?

Tests updated per review.


https://reviews.llvm.org/D29489

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  lib/CodeGen/SelectionDAG/LegalizeTypes.h
  lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
  lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  test/CodeGen/ARM/vuzp.ll
  test/CodeGen/NVPTX/f16x2-instructions.ll
  test/CodeGen/SystemZ/vec-cmp-cmp-logic-select.ll
  test/CodeGen/SystemZ/vec-cmpsel.ll
  test/CodeGen/X86/2011-10-19-widen_vselect.ll
  test/CodeGen/X86/2011-10-21-widen-cmp.ll
  test/CodeGen/X86/psubus.ll
  test/CodeGen/X86/vselect-pcmp.ll

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