[PATCH] D30472: [DAGCombine] Simplify ISD::AND in GetDemandedBits.

[Eli Friedman via Phabricator via llvm-commits]

efriedma created this revision.

This helps in cases involving bitfields where an AND is exposed by legalization.


Repository:
  rL LLVM

https://reviews.llvm.org/D30472

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  test/CodeGen/ARM/illegal-bitfield-loadstore.ll
  test/CodeGen/X86/avx512-insert-extract.ll
  test/CodeGen/X86/illegal-bitfield-loadstore.ll
  test/CodeGen/X86/xaluo.ll

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