[PATCH] D30439: [AMDGPU] New method to estimate register pressure

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 28 08:18:24 PST 2017


rampitec added inline comments.


================
Comment at: lib/Target/AMDGPU/GCNSchedStrategy.cpp:415
+    if (LaneMask.any()) {
+      LiveIns[Reg] = LaneBitmask::getNone();
+      setMask(MRI, SRI, Reg, LiveIns[Reg], LaneMask, SGPRs, VGPRs);
----------------
vpykhtin wrote:
> When a map is indexed for non-existent key the value constructed with default constructor is inserted for this key. LaneBitmask::getNone ()is just a syntax sugar for LaneBitmask(). So you can just read LiveIns[Reg] here without initializing it.
LaneBitmask does not have default initializer value. I guess it worth nothing that LaneBitmask() should result in zero initialization.


================
Comment at: lib/Target/AMDGPU/GCNSchedStrategy.cpp:473
+        LiveRegs[Reg] = LaneBitmask::getNone();
+      setMask(MRI, SRI, Reg, LiveRegs[Reg], LiveRegs[Reg] | LaneMask,
+              SGPRs, VGPRs);
----------------
vpykhtin wrote:
> Please don't copy/paste map indexing. You can't assume compiler will always optimize this and the operation involves hash calculation on the key and array indexing (in the best case). I don't encorage such copy/paste indexing even for ordinary arrays.
OK, I can get references. That will be more verbose but less work for compiler to optimize.


Repository:
  rL LLVM

https://reviews.llvm.org/D30439





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