[PATCH] D30364: AArch64 : Add PreferCSEL feature for Exynos-M3.
James Molloy via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 28 01:02:01 PST 2017
jmolloy added a comment.
Hi Renato,
> If the core doesn't support CSEL, let's mark it as unavailable. If it does, but the cost is bad (for whatever reason), this really really should be in the cost model...
I have a bit more background on this as Junmo has talked to me offline. The core *does* support CSINV and friends, but they aren't as efficient as CSEL. Therefore, Junmo would like to disable the patterns that generate CSINV and friends (this could increase register pressure, but for his target the payoff is great enough).
James
https://reviews.llvm.org/D30364
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