[PATCH] D30364: AArch64 : Add PreferCSEL feature for Exynos-M3.

[Renato Golin via Phabricator via llvm-commits]

rengolin added inline comments.


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Comment at: lib/Target/AArch64/AArch64.td:54
+// Some targets (e.g. Exynos-M3) using CSEL is more prefer than CSINV, CSINC.
+def FeaturePreferCSEL : SubtargetFeature<"prefer-csel", "PreferCSEL",
+                                           "true", "Prefer CSEL">;
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Can't this be mapped in the cost model?


https://reviews.llvm.org/D30364