[llvm] r296285 - [AVX-512] Fix execution domain of scalar VRANGE/REDUCE/GETMANT with sae.

[Craig Topper via llvm-commits]

Author: ctopper
Date: Sun Feb 26 00:45:37 2017
New Revision: 296285

URL: http://llvm.org/viewvc/llvm-project?rev=296285&view=rev
Log:
[AVX-512] Fix execution domain of scalar VRANGE/REDUCE/GETMANT with sae.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrAVX512.td

Modified: llvm/trunk/lib/Target/X86/X86InstrAVX512.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrAVX512.td?rev=296285&r1=296284&r2=296285&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrAVX512.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrAVX512.td Sun Feb 26 00:45:37 2017
@@ -8310,6 +8310,7 @@ multiclass avx512_fp_sae_packed_imm<bits
 //handle scalar instruction  reg_vec1 = op(reg_vec2,reg_vec3,imm),{sae}
 multiclass avx512_fp_sae_scalar_imm<bits<8> opc, string OpcodeStr,
                                              SDNode OpNode, X86VectorVTInfo _> {
+  let ExeDomain = _.ExeDomain in
   defm NAME#rrib : AVX512_maskable_scalar<opc, MRMSrcReg, _, (outs _.RC:$dst),
                       (ins _.RC:$src1, _.RC:$src2, i32u8imm:$src3),
                       OpcodeStr, "$src3, {sae}, $src2, $src1",