[PATCH] D30145: AMDGPU/SI: Fix SI scheduler LiveOut Refcount issue

[Axel Davy via Phabricator via llvm-commits]

axeldavy updated this revision to Diff 89800.
axeldavy added a comment.
Herald added a subscriber: dstuttard.

I added the suggested changes.
Also, it seems that incrementing non-existing map element will create it with value 0 (and then increment it), thus I don't need to check at all the existence:
++LiveOutRegsNumUsages[ID][Reg];
is enough.

I will propose a patch that will update the other cases in the code that would benefit this.


https://reviews.llvm.org/D30145

Files:
  lib/Target/AMDGPU/SIMachineScheduler.cpp
  lib/Target/AMDGPU/SIMachineScheduler.h


Index: lib/Target/AMDGPU/SIMachineScheduler.h
===================================================================
--- lib/Target/AMDGPU/SIMachineScheduler.h
+++ lib/Target/AMDGPU/SIMachineScheduler.h
@@ -467,6 +467,14 @@
     return InRegs;
   }
 
+  std::set<unsigned> getOutRegs() {
+    std::set<unsigned> OutRegs;
+    for (const auto &RegMaskPair : RPTracker.getPressure().LiveOutRegs) {
+      OutRegs.insert(RegMaskPair.RegUnit);
+    }
+    return OutRegs;
+  };
+
   unsigned getVGPRSetID() const { return VGPRSetID; }
   unsigned getSGPRSetID() const { return SGPRSetID; }
 
Index: lib/Target/AMDGPU/SIMachineScheduler.cpp
===================================================================
--- lib/Target/AMDGPU/SIMachineScheduler.cpp
+++ lib/Target/AMDGPU/SIMachineScheduler.cpp
@@ -1361,6 +1361,24 @@
   std::set<unsigned> InRegs = DAG->getInRegs();
   addLiveRegs(InRegs);
 
+  // Increase LiveOutRegsNumUsages for blocks
+  // producing registers consumed in another
+  // scheduling region.
+  for (unsigned Reg : DAG->getOutRegs()) {
+    for (unsigned i = 0, e = Blocks.size(); i != e; ++i) {
+      // Do reverse traversal
+      int ID = BlocksStruct.TopDownIndex2Block[Blocks.size()-1-i];
+      SIScheduleBlock *Block = Blocks[ID];
+      const std::set<unsigned> OutRegs = Block->getOutRegs();
+
+      if (OutRegs.find(Reg) == OutRegs.end())
+        continue;
+
+      ++LiveOutRegsNumUsages[ID][Reg];
+      break;
+    }
+  }
+
   // Fill LiveRegsConsumers for regs that were already
   // defined before scheduling.
   for (unsigned i = 0, e = Blocks.size(); i != e; ++i) {


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