[PATCH] D30324: [ARM] Thumb2: favor R4-R7 over R12/LR in allocation order when opt for minsize

[Weiming Zhao via Phabricator via llvm-commits]

weimingz added a comment.

Sure, I will get more numbers for other benchmarks.



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Comment at: lib/CodeGen/RegisterClassInfo.cpp:129
 
+  if (TRI->costPerUseOverridesCSR(*MF)) {
+    // If cost per use outweights CSR in deciding allocation order, we reorder
----------------
rengolin wrote:
> I'm not very knowledgeable in this part of the code, but it seems you're destroying everything the above code was trying to do with the RCI order. It looks to me as though you should try to add the logic into the loop above, rather than splitting and discarding.
The code will maintain the original order if two registers have the same priority by using stable_sort: one register has lower CostPerUse, it has higher priority. Otherwise,  the caller saved register have higher priority. Everything equal, the original order is kept.


Repository:
  rL LLVM

https://reviews.llvm.org/D30324