[llvm] r295378 - [LSR] Prevent formula with SCEVAddRecExpr type of Reg from Sibling loops

[Rafael Avila de Espindola via llvm-commits]

Wei Mi via llvm-commits <llvm-commits at lists.llvm.org> writes:
> Filed a bug here: https://bugs.llvm.org/show_bug.cgi?id=32043
> I will take a deeper look into it.

I uploaded an somewhat reduced testcase there. Do you have an idea of
when you would be able to debug it? If not, could you revert it for now?

Thanks,
Rafael