[llvm] r296077 - Fix old testcase for dead store to match the original intent.
Eli Friedman via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 23 18:58:50 PST 2017
Author: efriedma
Date: Thu Feb 23 20:58:49 2017
New Revision: 296077
URL: http://llvm.org/viewvc/llvm-project?rev=296077&view=rev
Log:
Fix old testcase for dead store to match the original intent.
The x86 backend has a special case for load+xor+store, which isn't really
what this is trying to test.
Modified:
llvm/trunk/test/CodeGen/X86/longlong-deadload.ll
Modified: llvm/trunk/test/CodeGen/X86/longlong-deadload.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/longlong-deadload.ll?rev=296077&r1=296076&r2=296077&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/longlong-deadload.ll (original)
+++ llvm/trunk/test/CodeGen/X86/longlong-deadload.ll Thu Feb 23 20:58:49 2017
@@ -1,14 +1,22 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
-; This should not load or store the top part of *P.
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu | FileCheck %s
+; FIXME: This should not load or store the top part of *P.
define void @test(i64* %P) nounwind {
; CHECK-LABEL: test:
-; CHECK: movl 4(%esp), %[[REGISTER:.*]]
-; CHECK-NOT: 4(%[[REGISTER]])
-; CHECK: ret
- %tmp1 = load i64, i64* %P, align 8 ; <i64> [#uses=1]
- %tmp2 = xor i64 %tmp1, 1 ; <i64> [#uses=1]
- store i64 %tmp2, i64* %P, align 8
- ret void
+; CHECK: # BB#0:
+; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT: movl (%eax), %ecx
+; CHECK-NEXT: movl 4(%eax), %edx
+; CHECK-NEXT: xorl $1, %ecx
+; CHECK-NEXT: orl $2, %ecx
+; CHECK-NEXT: movl %edx, 4(%eax)
+; CHECK-NEXT: movl %ecx, (%eax)
+; CHECK-NEXT: retl
+ %tmp1 = load i64, i64* %P, align 8
+ %tmp2 = xor i64 %tmp1, 1
+ %tmp3 = or i64 %tmp2, 2
+ store i64 %tmp3, i64* %P, align 8
+ ret void
}
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