[llvm] r295871 - Revert "AMDGPU : Update TrapCode based on Trap Handler ABI."
Wei Ding via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 22 12:29:23 PST 2017
Author: wdng
Date: Wed Feb 22 14:29:22 2017
New Revision: 295871
URL: http://llvm.org/viewvc/llvm-project?rev=295871&view=rev
Log:
Revert "AMDGPU : Update TrapCode based on Trap Handler ABI."
This reverts commit r295867.
Modified:
llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h
llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.td
llvm/trunk/lib/Target/AMDGPU/SIInstructions.td
llvm/trunk/test/CodeGen/AMDGPU/trap.ll
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h?rev=295871&r1=295870&r2=295871&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h Wed Feb 22 14:29:22 2017
@@ -74,19 +74,15 @@ public:
TrapHandlerAbiHsa = 1
};
- enum TrapID {
- TrapIDHardwareReserved = 0,
- TrapIDHSADebugTrap = 1,
- TrapIDLLVMTrap = 2,
- TrapIDLLVMDebugTrap = 3,
- TrapIDDebugBreakpoint = 7,
- TrapIDDebugReserved8 = 8,
- TrapIDDebugReservedFE = 0xfe,
- TrapIDDebugReservedFF = 0xff
+ enum TrapCode {
+ TrapCodeBreakPoint = 0,
+ TrapCodeLLVMTrap = 1,
+ TrapCodeLLVMDebugTrap = 2,
+ TrapCodeHSADebugTrap = 3
};
enum TrapRegValues {
- LLVMTrapHandlerRegValue = 1
+ TrapCodeLLVMTrapRegValue = 1
};
protected:
Modified: llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp?rev=295871&r1=295870&r2=295871&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp Wed Feb 22 14:29:22 2017
@@ -1804,7 +1804,7 @@ MachineBasicBlock *SITargetLowering::Emi
.addReg(AMDGPU::SGPR0_SGPR1, RegState::Implicit);
} else {
switch (TrapType) {
- case SISubtarget::TrapIDLLVMTrap:
+ case SISubtarget::TrapCodeLLVMTrap:
BuildMI(*BB, MI, DL, TII->get(AMDGPU::S_ENDPGM));
break;
case SISubtarget::TrapCodeLLVMDebugTrap: {
Modified: llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.td?rev=295871&r1=295870&r2=295871&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.td Wed Feb 22 14:29:22 2017
@@ -632,9 +632,9 @@ def DSTOMOD {
int NONE = 0;
}
-def TRAPID{
- int LLVM_TRAP = 2;
- int LLVM_DEBUG_TRAP = 3;
+def TRAPTYPE {
+ int LLVM_TRAP = 1;
+ int LLVM_DEBUG_TRAP = 2;
}
//===----------------------------------------------------------------------===//
Modified: llvm/trunk/lib/Target/AMDGPU/SIInstructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIInstructions.td?rev=295871&r1=295870&r2=295871&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIInstructions.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIInstructions.td Wed Feb 22 14:29:22 2017
@@ -391,12 +391,12 @@ def SI_PC_ADD_REL_OFFSET : SPseudoInstSI
let Predicates = [isGCN] in {
def : Pat<
(trap),
- (S_TRAP_PSEUDO TRAPID.LLVM_TRAP)
+ (S_TRAP_PSEUDO TRAPTYPE.LLVM_TRAP)
>;
def : Pat<
(debugtrap),
- (S_TRAP_PSEUDO TRAPID.LLVM_DEBUG_TRAP)
+ (S_TRAP_PSEUDO TRAPTYPE.LLVM_DEBUG_TRAP)
>;
def : Pat<
Modified: llvm/trunk/test/CodeGen/AMDGPU/trap.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/trap.ll?rev=295871&r1=295870&r2=295871&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/trap.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/trap.ll Wed Feb 22 14:29:22 2017
@@ -28,7 +28,7 @@ declare void @llvm.debugtrap() #0
; GCN-LABEL: {{^}}hsa_trap:
; HSA-TRAP: enable_trap_handler = 1
; HSA-TRAP: s_mov_b64 s[0:1], s[4:5]
-; HSA-TRAP: s_trap 2
+; HSA-TRAP: s_trap 1
; for llvm.trap in hsa path without ABI, direct generate s_endpgm instruction without any warning information
; NO-HSA-TRAP: enable_trap_handler = 0
@@ -55,7 +55,7 @@ define void @hsa_trap() {
; GCN-LABEL: {{^}}hsa_debugtrap:
; HSA-TRAP: enable_trap_handler = 1
; HSA-TRAP: s_mov_b64 s[0:1], s[4:5]
-; HSA-TRAP: s_trap 3
+; HSA-TRAP: s_trap 2
; for llvm.debugtrap in non-hsa path without ABI, generate a warning and a s_endpgm instruction
; NO-HSA-TRAP: enable_trap_handler = 0
More information about the llvm-commits
mailing list