[llvm] r295864 - Bring back 2>&1 redirection for this test

[Matthias Braun via llvm-commits]

Author: matze
Date: Wed Feb 22 13:16:33 2017
New Revision: 295864

URL: http://llvm.org/viewvc/llvm-project?rev=295864&view=rev
Log:
Bring back 2>&1 redirection for this test

Modified:
    llvm/trunk/test/CodeGen/Hexagon/expand-condsets-rm-reg.mir

Modified: llvm/trunk/test/CodeGen/Hexagon/expand-condsets-rm-reg.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/expand-condsets-rm-reg.mir?rev=295864&r1=295863&r2=295864&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/expand-condsets-rm-reg.mir (original)
+++ llvm/trunk/test/CodeGen/Hexagon/expand-condsets-rm-reg.mir Wed Feb 22 13:16:33 2017
@@ -1,4 +1,4 @@
-# RUN: llc -march=hexagon -run-pass expand-condsets -o - %s -verify-machineinstrs -debug-only=expand-condsets | FileCheck %s
+# RUN: llc -march=hexagon -run-pass expand-condsets -o - %s -verify-machineinstrs -debug-only=expand-condsets 2>&1 | FileCheck %s
 # REQUIRES: asserts
 
 # Check that coalesced registers are removed from live intervals.