[PATCH] D30186: [AVX-512] Allow legacy scalar min/max intrinsics to select EVEX instructions when available
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 20 22:36:39 PST 2017
craig.topper created this revision.
This patch introduces new X86ISD::FMAXS and X86ISD::FMINS opcodes. The legacy intrinsics now lower to this node. As do the AVX-512 masked intrinsics when the rounding mode is CUR_DIRECTION.
I've merged a copy of the tablegen multiclass avx512_fp_scalar into avx512_fp_scalar_sae. avx512_fp_scalar still needs to support CUR_DIRECTION appearing as a rounding mode for X86ISD::FADD_ROUND and others.
https://reviews.llvm.org/D30186
Files:
lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86ISelLowering.h
lib/Target/X86/X86InstrAVX512.td
lib/Target/X86/X86InstrFormats.td
lib/Target/X86/X86InstrFragmentsSIMD.td
lib/Target/X86/X86InstrSSE.td
lib/Target/X86/X86IntrinsicsInfo.h
test/CodeGen/X86/avx-intrinsics-x86.ll
test/CodeGen/X86/sse-intrinsics-x86.ll
test/CodeGen/X86/sse2-intrinsics-x86.ll
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