[PATCH] D30176: [X86][SSE] Attempt to extract vector elements through target shuffles

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.

DAGCombiner already supports peeking thorough shuffles to improve vector element extraction, but legalization often leaves us in situations where we need to extract vector elements after shuffles have already been lowered.

This patch adds support for VECTOR_EXTRACT_ELEMENT/PEXTRW/PEXTRB instructions to attempt to handle target shuffles as well. I've covered some basic scenarios including handling shuffle mask scaling and the implicit zero-extension of PEXTRW/PEXTRB, there is more that could be done here (that I've mentioned in TODOs) but I haven't found many cases where its worth it.

Additional venues to consider include adding some form of 'TargetLowering::isVectorExtractionLegal()' check to try to handle more of these cases in DAGCombiner, and a SelectionDAG form of SimplifyDemandedVectorElts.


Repository:
  rL LLVM

https://reviews.llvm.org/D30176

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/2011-12-8-bitcastintprom.ll
  test/CodeGen/X86/dagcombine-cse.ll
  test/CodeGen/X86/oddshuffles.ll
  test/CodeGen/X86/promote-vec3.ll
  test/CodeGen/X86/vec_extract-mmx.ll
  test/CodeGen/X86/vec_shift7.ll
  test/CodeGen/X86/vector-compare-results.ll
  test/CodeGen/X86/widen_conv-1.ll
  test/CodeGen/X86/widen_load-2.ll

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