[PATCH] D29675: [ARM/AArch64] Update costs for interleaved accesses with wide types

[Renato Golin via Phabricator via llvm-commits]

rengolin accepted this revision.
rengolin added a comment.
This revision is now accepted and ready to land.

Silly nit and LGTM otherwise, depending on https://reviews.llvm.org/D29466.



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Comment at: lib/Target/AArch64/AArch64TargetTransformInfo.cpp:515
+    if (NumElts % Factor == 0 && (SubVecSize == 64 || SubVecSize % 128 == 0)) {
+      unsigned NumMemOps = SubVecSize > 128 ? SubVecSize / 128 : 1;
+      return Factor * NumMemOps;
----------------
Maybe `(SubVecSize + 127 / 128) * Factor` ?


https://reviews.llvm.org/D29675