[PATCH] D30090: [mips] Fix return lowering

[Simon Dardis via Phabricator via llvm-commits]

sdardis created this revision.

Fix a machine verifier issue where a instruction was using a invalid
register. The return pseudo is expanded and has the return address
register added to it. The return register may have been spuriously
mark as killed earlier.

This partially resolves PR/27458

Thanks to Quentin Colombet for reporting the issue!


https://reviews.llvm.org/D30090

Files:
  lib/Target/Mips/MipsSEInstrInfo.cpp
  test/CodeGen/Mips/return_address.ll
  test/CodeGen/Mips/tnaked.ll


Index: test/CodeGen/Mips/tnaked.ll
===================================================================
--- test/CodeGen/Mips/tnaked.ll
+++ test/CodeGen/Mips/tnaked.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=mipsel < %s | FileCheck %s
+; RUN: llc -march=mipsel < %s -verify-machineinstrs | FileCheck %s
 
 
 define void @tnaked() #0 {
Index: test/CodeGen/Mips/return_address.ll
===================================================================
--- test/CodeGen/Mips/return_address.ll
+++ test/CodeGen/Mips/return_address.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=mipsel < %s | FileCheck %s
+; RUN: llc -march=mipsel -verify-machineinstrs < %s | FileCheck %s
 
 define i8* @f1() nounwind {
 entry:
Index: lib/Target/Mips/MipsSEInstrInfo.cpp
===================================================================
--- lib/Target/Mips/MipsSEInstrInfo.cpp
+++ lib/Target/Mips/MipsSEInstrInfo.cpp
@@ -540,11 +540,20 @@
 
 void MipsSEInstrInfo::expandRetRA(MachineBasicBlock &MBB,
                                   MachineBasicBlock::iterator I) const {
+
+  MachineInstrBuilder MIB;
   if (Subtarget.isGP64bit())
-    BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn64))
-        .addReg(Mips::RA_64);
+    MIB = BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn64))
+              .addReg(Mips::RA_64, RegState::Undef);
   else
-    BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn)).addReg(Mips::RA);
+    MIB = BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn))
+              .addReg(Mips::RA, RegState::Undef);
+
+  // Retain any imp-use flags.
+  for (auto & MO : I->operands()) {
+    if (MO.isImplicit())
+      MIB.add(MO);
+  }
 }
 
 void MipsSEInstrInfo::expandERet(MachineBasicBlock &MBB,


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