[PATCH] D28652: [NDS32 15/46] Add 32-bit Load/Store Instructions with [Reg + Imm] addressing mode

[Shiva Chen via Phabricator via llvm-commits]

shiva0217 updated this revision to Diff 88685.
shiva0217 retitled this revision from "[NDS32 15/22] add NDS32 Selection Dag Info class" to "[NDS32 15/46] Add 32-bit Load/Store Instructions with [Reg + Imm] addressing mode".
shiva0217 edited the summary of this revision.

https://reviews.llvm.org/D28652

Files:
  lib/Target/NDS32/InstPrinter/NDS32InstPrinter.cpp
  lib/Target/NDS32/InstPrinter/NDS32InstPrinter.h
  lib/Target/NDS32/NDS32ISelDAGToDAG.cpp
  lib/Target/NDS32/NDS32InstrFormats.td
  lib/Target/NDS32/NDS32InstrInfo.td
  lib/Target/NDS32/NDS32Predicate.td
  lib/Target/NDS32/NDS32RegisterInfo.cpp
  test/CodeGen/NDS32/load-store-insns.ll

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