[PATCH] D29856: [X86]: Add imp-uses of live regs when creating conditional tail calls (PR31257)

[Quentin Colombet via Phabricator via llvm-commits]

qcolombet accepted this revision.
qcolombet added a comment.
This revision is now accepted and ready to land.

LGTM



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Comment at: test/CodeGen/X86/tail-call-conditional.mir:51
   ; CHECK-NEXT: CMP64ri8 %rax, 9, implicit-def %eflags
-  ; CHECK-NEXT: TCRETURNdi64cc @f1, 0, 3, csr_64, implicit %rsp, implicit %eflags, implicit %rsp, implicit %rdi, implicit %rsi
+  ; CHECK-NEXT: TCRETURNdi64cc @f1, 0, 3, csr_64, implicit %rsp, implicit %eflags, implicit %rsp, implicit %rdi, implicit %rsi, implicit %rax, implicit %sil, implicit %si, implicit %esi, implicit %rsi, implicit %dil, implicit %di, implicit %edi, implicit %rdi, implicit %ah, implicit %al, implicit %ax, implicit %eax
 
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hans wrote:
> There is a lot of redundancy in the list of implicitly used registers. Do you know of a convenient way to clean it up?
I don't think we have a convenient way to clean that up other than eliminating the redundancies programmatically.
One way to do this is to walk through the list and remember the register with the largest size for each clobbered reg unit.
I believe we do something like that somewhere else, but I don't remember where on top of my head. What I am saying is that there may be opportunities to share some code.


https://reviews.llvm.org/D29856