[PATCH] D29388: [PPC] Use rldicr instruction for AND with an immediate if possible

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai added inline comments.


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Comment at: test/CodeGen/PowerPC/i64_fp_round.ll:23
 ; CHECK-NO-ISEL: bc 12, 1, [[TRUE:.LBB[0-9]+]]
-; CHECK-NO-ISEL: ori 11, 3, 0
+; CHECK-NO-ISEL: ori 12, 3, 0
 ; CHECK-NO-ISEL-NEXT: b [[SUCCESSOR:.LBB[0-9]+]]
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Why did this change? Is it because there are more/fewer instructions emitted for this test case that are not tested for? If this is the case, I think it makes more sense to use FileCheck variables for these registers rather than hard-coding them. 


https://reviews.llvm.org/D29388