[PATCH] D29934: [RISCV 12/n] Codegen support for memory operations

[Alex Bradbury via Phabricator via llvm-commits]

asb created this revision.

As a reminder, the philosophy here is to avoid copying large portions of codes from other backends, and only add new code paths when they are both needed and can be tested. As such, even though there's nothing preventing this patch from supporting compilation with PIC, it's something that should come later. I feel this is a logical "next testable unit" after the initial ALU codegen.

I'd particularly welcome feedback on the approach for lowerGlobalAddress. I feel I'd rather handle all the lui/addi and similar cases in a later peephole pass, but would be very interested if people would advocate an alternative approach.


https://reviews.llvm.org/D29934

Files:
  lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
  lib/Target/RISCV/RISCV.h
  lib/Target/RISCV/RISCVAsmPrinter.cpp
  lib/Target/RISCV/RISCVISelLowering.cpp
  lib/Target/RISCV/RISCVISelLowering.h
  lib/Target/RISCV/RISCVInstrInfo.cpp
  lib/Target/RISCV/RISCVInstrInfo.h
  lib/Target/RISCV/RISCVInstrInfo.td
  lib/Target/RISCV/RISCVMCInstLower.cpp
  lib/Target/RISCV/RISCVSubtarget.h
  test/CodeGen/RISCV/alu.ll
  test/CodeGen/RISCV/mem.ll

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