[PATCH] D29874: [X86] Generate VZEROUPPER for Skylake-avx512
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 13 20:11:04 PST 2017
craig.topper added inline comments.
================
Comment at: lib/Target/X86/X86.td:241
"Use software floating point features.">;
-// On at least some AMD processors, there is no performance hazard to writing
-// only the lower parts of a YMM register without clearing the upper part.
-def FeatureFastPartialYMMWrite
- : SubtargetFeature<"fast-partial-ymm-write", "HasFastPartialYMMWrite",
- "true", "Partial writes to YMM registers are fast">;
+// On Some X86 processors, there is no performance hazard to writing only the
+// lower parts of a YMM or ZMM register without clearing the upper part.
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Minor nit. The word "Some" shouldn't be capitalized.
================
Comment at: lib/Target/X86/X86VZeroUpper.cpp:222
+ // explicitly specified.
+ if (IsCall && !callHasRegMask(MI))
continue;
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Why did this change to not check specific register clobbers?
================
Comment at: lib/Target/X86/X86VZeroUpper.cpp:225
// The VZEROUPPER instruction resets the upper 128 bits of all AVX
// registers. In addition, the processor changes back to Clean state, after
----------------
This comments is stale with ZMM. It's not upper 128 bits.
https://reviews.llvm.org/D29874
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