[PATCH] D29454: [DAGCombine] RFC: Recognise any_extend_vector_inreg and truncation style shuffle masks
Elena Demikhovsky via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Feb 12 23:09:55 PST 2017
delena added inline comments.
================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:14268
+ for (unsigned Scale = 2; Scale < NumElts; Scale *= 2) {
+ if ((NumElts % Scale) != 0)
+ continue;
----------------
I don't understand why do you need this check.
You check Mask in IsTruncate(), it should be enough.
================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:14276
+ // TODO: handle more extension/truncation cases as cases arise.
+ if (EltSizeInBits == ExtSrcSizeInBits)
+ return DAG.getBitcast(VT, N00);
----------------
I'd check at the beginning, before IsTruncate().
if (N00.getValueType().getSizeInBits() != VT.getSizeInBits())
return SDValue();
Repository:
rL LLVM
https://reviews.llvm.org/D29454
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