[llvm] r294843 - Fix "left shift of negative value -1" introduced by r294805

[Vitaly Buka via llvm-commits]

Could you please check? Not sure if negative value was expected there.
I decided to fix as bots are red for a while, and other changes landed on
top of it.

On Sat, Feb 11, 2017 at 4:55 AM Vitaly Buka via llvm-commits <
llvm-commits at lists.llvm.org> wrote:

> Author: vitalybuka
> Date: Sat Feb 11 06:44:03 2017
> New Revision: 294843
>
> URL: http://llvm.org/viewvc/llvm-project?rev=294843&view=rev
> Log:
> Fix "left shift of negative value -1" introduced by r294805
>
> Modified:
>     llvm/trunk/lib/Target/Hexagon/HexagonHardwareLoops.cpp
>
> Modified: llvm/trunk/lib/Target/Hexagon/HexagonHardwareLoops.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonHardwareLoops.cpp?rev=294843&r1=294842&r2=294843&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/Hexagon/HexagonHardwareLoops.cpp (original)
> +++ llvm/trunk/lib/Target/Hexagon/HexagonHardwareLoops.cpp Sat Feb 11
> 06:44:03 2017
> @@ -1511,7 +1511,7 @@ bool HexagonHardwareLoops::checkForImmed
>        int64_t V1, V2;
>        if (!checkForImmediate(S1, V1) || !checkForImmediate(S2, V2))
>          return false;
> -      TV = V2 | (V1 << 32);
> +      TV = V2 | (static_cast<uint64_t>(V1) << 32);
>        break;
>      }
>      case TargetOpcode::REG_SEQUENCE: {
>
>
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