[llvm] r294825 - The patch fixes r294821

[Evgeny Stupachenko via llvm-commits]

Author: evstupac
Date: Fri Feb 10 23:39:00 2017
New Revision: 294825

URL: http://llvm.org/viewvc/llvm-project?rev=294825&view=rev
Log:
The patch fixes r294821
Summary:
Update register match for windows testing

From: Evgeny Stupachenko <evstupac at gmail.com>

Modified:
    llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-insns-1.ll
    llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-insns-2.ll

Modified: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-insns-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-insns-1.ll?rev=294825&r1=294824&r2=294825&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-insns-1.ll (original)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-insns-1.ll Fri Feb 10 23:39:00 2017
@@ -21,9 +21,9 @@
 ;   incq %rax
 
 ; CHECK:      LBB0_1:
-; CHECK-NEXT:   movl 4096(%{{...}},[[REG:%...]]
-; CHECK-NEXT:   addl 4096(%{{...}},[[REG]]
-; CHECK-NEXT:   movl %{{...}}, 4096(%{{...}},[[REG]]
+; CHECK-NEXT:   movl 4096(%{{.+}},[[REG:%[0-9a-z]+]]
+; CHECK-NEXT:   addl 4096(%{{.+}},[[REG]]
+; CHECK-NEXT:   movl %{{.+}}, 4096(%{{.+}},[[REG]]
 ; CHECK-NOT:    cmp
 ; CHECK:        jne
 

Modified: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-insns-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-insns-2.ll?rev=294825&r1=294824&r2=294825&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-insns-2.ll (original)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-insns-2.ll Fri Feb 10 23:39:00 2017
@@ -21,9 +21,9 @@
 ; LSR should prefer complicated address to additonal add instructions.
 
 ; CHECK:      LBB0_2:
-; CHECK-NEXT:   movl (%r{{[a-z][a-z]}},
-; CHECK-NEXT:   addl (%r{{[a-z][a-z]}},
-; CHECK-NEXT:   movl %e{{[a-z][a-z]}}, (%r{{[a-z][a-z]}},
+; CHECK-NEXT:   movl (%r{{.+}},
+; CHECK-NEXT:   addl (%r{{.+}},
+; CHECK-NEXT:   movl %e{{.+}}, (%r{{.+}},
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"