[PATCH] D25987: [X86] New pattern to generate PSUBUS from SELECT
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 10 11:59:54 PST 2017
spatel added a comment.
It's difficult for me to see what's going on in these tests because there are a bunch of irrelevant load/store/gep/bitcast instructions. Can you remove those?
If you do that, the root of the problem is very similar to:
https://reviews.llvm.org/rL286776
Ie, if we recognized the umin/umax patterns in IR as ISD::UMIN/ISD::UMAX when we created the DAG, the subsequent matching to the x86-specific PSUBUS might already happen with the existing lowering?
https://reviews.llvm.org/D25987
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