[PATCH] D29798: [AMDGPU] Override PSet for M0

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: lib/Target/AMDGPU/SIRegisterInfo.cpp:1336-1337
+
+  if (hasRegUnit(AMDGPU::M0, RegUnit))
+    return Empty;
+  return AMDGPURegisterInfo::getRegUnitPressureSets(RegUnit);
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Is == M0 sufficient? m0 should be its own regunit since it can't be a subregister


================
Comment at: test/CodeGen/AMDGPU/schedule-regpressure.mir:1
+# RUN: llc -march=amdgcn -misched=converge -run-pass machine-scheduler %s -o - -debug-only=misched 2>&1 | FileCheck %s
+# Check there is no SReg_32 pressure created by DS_* instructions because of M0 use
----------------
This is going to break in a release build 


Repository:
  rL LLVM

https://reviews.llvm.org/D29798