[llvm] r294677 - ARMSubtarget.h: Change to one line per enum element; NFC
Matthias Braun via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 9 16:06:45 PST 2017
Author: matze
Date: Thu Feb 9 18:06:44 2017
New Revision: 294677
URL: http://llvm.org/viewvc/llvm-project?rev=294677&view=rev
Log:
ARMSubtarget.h: Change to one line per enum element; NFC
Change syntax to have enum elements sorted alphabetically and one per
line as that is more merge/cherry pick friendly.
Modified:
llvm/trunk/lib/Target/ARM/ARMSubtarget.h
Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.h?rev=294677&r1=294676&r2=294677&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.h Thu Feb 9 18:06:44 2017
@@ -41,19 +41,66 @@ class StringRef;
class ARMSubtarget : public ARMGenSubtargetInfo {
protected:
enum ARMProcFamilyEnum {
- Others, CortexA5, CortexA7, CortexA8, CortexA9, CortexA12, CortexA15,
- CortexA17, CortexR4, CortexR4F, CortexR5, CortexR7, CortexR52, CortexM3,
- CortexA32, CortexA35, CortexA53, CortexA57, CortexA72, CortexA73,
- Krait, Swift, ExynosM1
+ Others,
+
+ CortexA12,
+ CortexA15,
+ CortexA17,
+ CortexA32,
+ CortexA35,
+ CortexA5,
+ CortexA53,
+ CortexA57,
+ CortexA7,
+ CortexA72,
+ CortexA73,
+ CortexA8,
+ CortexA9,
+ CortexM3,
+ CortexR4,
+ CortexR4F,
+ CortexR5,
+ CortexR52,
+ CortexR7,
+ ExynosM1
+ Krait,
+ Swift,
};
enum ARMProcClassEnum {
- None, AClass, RClass, MClass
+ None,
+
+ AClass,
+ MClass,
+ RClass
};
enum ARMArchEnum {
- ARMv2, ARMv2a, ARMv3, ARMv3m, ARMv4, ARMv4t, ARMv5, ARMv5t, ARMv5te,
- ARMv5tej, ARMv6, ARMv6k, ARMv6kz, ARMv6t2, ARMv6m, ARMv6sm, ARMv7a, ARMv7ve,
- ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv81a, ARMv82a, ARMv8mMainline,
- ARMv8mBaseline, ARMv8r
+ ARMv2,
+ ARMv2a,
+ ARMv3,
+ ARMv3m,
+ ARMv4,
+ ARMv4t,
+ ARMv5,
+ ARMv5t,
+ ARMv5te,
+ ARMv5tej,
+ ARMv6,
+ ARMv6k,
+ ARMv6kz,
+ ARMv6m,
+ ARMv6sm,
+ ARMv6t2,
+ ARMv7a,
+ ARMv7em,
+ ARMv7m,
+ ARMv7r,
+ ARMv7ve,
+ ARMv81a,
+ ARMv82a,
+ ARMv8a,
+ ARMv8mBaseline,
+ ARMv8mMainline,
+ ARMv8r
};
public:
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